Re: [PATCH] gpio: mxs: Use PIN2IRQ register to mask interrupts

[Shawn Guo <shawn.guo@xxxxxxxxxx>]

On Tue, Jan 13, 2015 at 07:34:31AM +0100, Linus Walleij wrote:
> On Mon, Dec 15, 2014 at 11:28 AM, Robin van der Gracht
> <robin@xxxxxxxxxxx> wrote:
> 
> > The PIN2IRQ register should be used to mask an interrupt. Clearing a

No, PIN2IRQ implements a function select, not a mask.

> > bit in the IRQEN register only prevents the interrupt from propagating but
> > still allows hardware to set the status bit when triggered.

Isn't it what a mask implementation supposed to do?

> > So when
> > unmasking the interrupt, it will immediately re-trigger if an interrupt
> > condition occurred during masking.

Per my understanding, this is the correct behavior.  If you do not want
that interrupt triggering, you should clear the interrupt status before
unmasking the interrupt.

Shawn

> >
> > This is unwanted behavior especially when using level triggered
> > interrupts. In this case every interrupt triggers twice. If the
> > interrupt is handled in the handler, the second interrupt will be
> > the first one to be able to ack the interrupt.
> >
> > Signed-off-by: Robin van der Gracht <robin@xxxxxxxxxxx>
> 
> Apparently MXS is a popular GPIO controller without a real maintainer.
> 
> Adding some random users to the To: line hoping we get some
> review of this patch.
> 
> Yours,
> Linus Walleij
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