Re: [PATCH v1] gpio: keystone: add dsp gpio controller driver

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Hi Varka Bhadram,

On 07/16/2014 01:05 PM, Varka Bhadram wrote:
On 07/16/2014 04:13 PM, Grygorii Strashko wrote:
From: Murali Karicheri <m-karicheri2@xxxxxx>

On Keystone SOCs, ARM host can send interrupts to DSP cores using the
DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ
signals for
each DSP core. This is one of the component used by the IPC mechanism
used
on Keystone SOCs.

Keystone 2 DSP GPIO controller has specific features:
- each GPIO can be configured only as output pin;
- setting GPIO value to 1 causes IRQ generation on target DSP core;
- reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
   pending.

Signed-off-by: Murali Karicheri <m-karicheri2@xxxxxx>
Signed-off-by: Grygorii Strashko <grygorii.strashko@xxxxxx>
---
  .../devicetree/bindings/gpio/gpio-keystone.txt     |   43 ++++++
  drivers/gpio/Kconfig                               |    8 ++
  drivers/gpio/Makefile                              |    1 +
  drivers/gpio/gpio-keystone.c                       |  138
++++++++++++++++++++
  4 files changed, 190 insertions(+)
  create mode 100644
Documentation/devicetree/bindings/gpio/gpio-keystone.txt
  create mode 100644 drivers/gpio/gpio-keystone.c

diff --git a/Documentation/devicetree/bindings/gpio/gpio-keystone.txt
b/Documentation/devicetree/bindings/gpio/gpio-keystone.txt
new file mode 100644
index 0000000..4f92af4
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-keystone.txt
@@ -0,0 +1,43 @@
+Keystone 2 DSP GPIO controller bindings
+
+HOST OS userland running on ARM can send interrupts to DSP cores using
+the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP
core.
+This is one of the component used by the IPC mechanism used on
Keystone SOCs.
+
+For example TCI6638K2K SoC has 8 DSP GPIO controllers:
+ - 8 for C66x CorePacx CPUs 0-7
+
+Keystone 2 DSP GPIO controller has specific features:
+- each GPIO can be configured only as output pin;
+- setting GPIO value to 1 causes IRQ generation on target DSP core;
+- reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
+  pending.
+
+Required Properties:
+- compatible: should be "ti,keystone-dsp-gpio"
+
+- ti,syscon-dev:    phandle/offset pair. The phandle to syscon used to
+            access device state control registers and the offset
+            in order to use block of device's specific registers.
+
+- gpio-controller : Marks the device node as a gpio controller.
+
+- #gpio-cells : Should be one.
+                See gpio.txt in this directory for a of the cells format

All the properties not properly aligned. It would be more readable if

Required Properties:
- compatible        : should be "ti,keystone-dsp-gpio"
- ti,syscon-dev        : phandle/offset pair. The phandle to syscon used to
               access device state control registers and the offset
               in order to use block of device's specific registers.
- gpio-controller    : Marks the device node as a gpio controller.
- #gpio-cells        : Should be one.
               See gpio.txt in this directory for a of the cells format

Unfortunately, the format of DT bindings description is not standardized, but i will try to beautify it :)


+
+Please refer to gpio.txt in this directory for details of the common
GPIO
+bindings used by client devices.
+

(...)

+static struct platform_driver keystone_gpio_driver = {
+    .probe        = keystone_gpio_probe,
+    .remove        = keystone_gpio_remove,
+    .driver        = {
+        .name    = "keystone-dsp-gpio",
+        .owner    = THIS_MODULE,

We can drop owner field...  :-)  .It will update by module_platform_driver



Thanks for your comments - I'll wait a bit and re-send.

Regards,
- grygorii

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