On Thu, May 22, 2014 at 6:59 AM, Zhu, Lejun <lejun.zhu@xxxxxxxxxxxxxxx> wrote: > Devices based on Intel SoC products such as Baytrail have a Power > Management IC. In the PMIC there are subsystems for voltage regulation, > A/D conversion, GPIO and PWMs. The PMIC in Baytrail-T platform is called > Crystal Cove. > > This patch adds support for the GPIO function in Crystal Cove. > > v2: > - Use IRQ chip helper to provide irqdomain. > - Implement .remove and can now build as a module. > - Various fix for unreadable or ugly code pieces. > v3: > - More fix in irq_handler and probe. (...) > + gpiochip_irqchip_add(&cg->chip, &crystalcove_irqchip, 0, > + handle_simple_irq, IRQ_TYPE_NONE); > + > + retval = request_threaded_irq(irq, NULL, crystalcove_gpio_irq_handler, > + IRQF_ONESHOT, KBUILD_MODNAME, cg); > + > + if (retval) { > + dev_warn(&pdev->dev, "request irq failed: %d\n", retval); > + goto out; > + } > + > + retval = gpiochip_add(&cg->chip); > + if (retval) { > + dev_warn(&pdev->dev, "add gpio chip error: %d\n", retval); > + goto out_free_irq; > + } As concluded from discussion, please switch the order of gpiochip_irqchip_add() and gpiochip_add() so that the gpiochip is added first, then the irqchip. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html