tree: https://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs.git work.asm-exports head: e1b27b33d149cf54144f015318d770e931b09b8c commit: e11463e4da41c7541d4769886588e26c79cc4689 [10/12] ia64: move exports to definitions config: ia64-sim_defconfig (attached as .config) reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout e11463e4da41c7541d4769886588e26c79cc4689 # save the attached .config to linux build tree make.cross ARCH=ia64 All errors (new ones prefixed by >>): arch/ia64/lib/lib.a(flush.o): In function `flush_icache_range': >> arch/ia64/lib/flush.S:29: undefined reference to `ia64_i_cache_stride_shift' arch/ia64/lib/lib.a(flush.o): In function `clflush_cache_range': >> arch/ia64/lib/flush.S:82: undefined reference to `ia64_cache_stride_shift' vim +29 arch/ia64/lib/flush.S ^1da177e Linus Torvalds 2005-04-16 23 */ 1f7ad57b Prasanna S Panchamukhi 2005-09-06 24 .section .kprobes.text,"ax" ^1da177e Linus Torvalds 2005-04-16 25 GLOBAL_ENTRY(flush_icache_range) 08357f82 Zoltan Menyhart 2005-06-03 26 ^1da177e Linus Torvalds 2005-04-16 27 .prologue ^1da177e Linus Torvalds 2005-04-16 28 alloc r2=ar.pfs,2,0,0,0 08357f82 Zoltan Menyhart 2005-06-03 @29 movl r3=ia64_i_cache_stride_shift 08357f82 Zoltan Menyhart 2005-06-03 30 mov r21=1 08357f82 Zoltan Menyhart 2005-06-03 31 ;; 08357f82 Zoltan Menyhart 2005-06-03 32 ld8 r20=[r3] // r20: stride shift 08357f82 Zoltan Menyhart 2005-06-03 33 sub r22=in1,r0,1 // last byte address 08357f82 Zoltan Menyhart 2005-06-03 34 ;; 08357f82 Zoltan Menyhart 2005-06-03 35 shr.u r23=in0,r20 // start / (stride size) 08357f82 Zoltan Menyhart 2005-06-03 36 shr.u r22=r22,r20 // (last byte address) / (stride size) 08357f82 Zoltan Menyhart 2005-06-03 37 shl r21=r21,r20 // r21: stride size of the i-cache(s) ^1da177e Linus Torvalds 2005-04-16 38 ;; 08357f82 Zoltan Menyhart 2005-06-03 39 sub r8=r22,r23 // number of strides - 1 08357f82 Zoltan Menyhart 2005-06-03 40 shl r24=r23,r20 // r24: addresses for "fc.i" = 08357f82 Zoltan Menyhart 2005-06-03 41 // "start" rounded down to stride boundary ^1da177e Linus Torvalds 2005-04-16 42 .save ar.lc,r3 ^1da177e Linus Torvalds 2005-04-16 43 mov r3=ar.lc // save ar.lc ^1da177e Linus Torvalds 2005-04-16 44 ;; ^1da177e Linus Torvalds 2005-04-16 45 ^1da177e Linus Torvalds 2005-04-16 46 .body ^1da177e Linus Torvalds 2005-04-16 47 mov ar.lc=r8 ^1da177e Linus Torvalds 2005-04-16 48 ;; 08357f82 Zoltan Menyhart 2005-06-03 49 /* 08357f82 Zoltan Menyhart 2005-06-03 50 * 32 byte aligned loop, even number of (actually 2) bundles 08357f82 Zoltan Menyhart 2005-06-03 51 */ 08357f82 Zoltan Menyhart 2005-06-03 52 .Loop: fc.i r24 // issuable on M0 only 08357f82 Zoltan Menyhart 2005-06-03 53 add r24=r21,r24 // we flush "stride size" bytes per iteration 08357f82 Zoltan Menyhart 2005-06-03 54 nop.i 0 ^1da177e Linus Torvalds 2005-04-16 55 br.cloop.sptk.few .Loop ^1da177e Linus Torvalds 2005-04-16 56 ;; ^1da177e Linus Torvalds 2005-04-16 57 sync.i ^1da177e Linus Torvalds 2005-04-16 58 ;; ^1da177e Linus Torvalds 2005-04-16 59 srlz.i ^1da177e Linus Torvalds 2005-04-16 60 ;; ^1da177e Linus Torvalds 2005-04-16 61 mov ar.lc=r3 // restore ar.lc ^1da177e Linus Torvalds 2005-04-16 62 br.ret.sptk.many rp ^1da177e Linus Torvalds 2005-04-16 63 END(flush_icache_range) e11463e4 Al Viro 2016-01-17 64 EXPORT_SYMBOL_GPL(flush_icache_range) 62fdd767 Fenghua Yu 2008-10-17 65 62fdd767 Fenghua Yu 2008-10-17 66 /* 62fdd767 Fenghua Yu 2008-10-17 67 * clflush_cache_range(start,size) 62fdd767 Fenghua Yu 2008-10-17 68 * 62fdd767 Fenghua Yu 2008-10-17 69 * Flush cache lines from start to start+size-1. 62fdd767 Fenghua Yu 2008-10-17 70 * 62fdd767 Fenghua Yu 2008-10-17 71 * Must deal with range from start to start+size-1 but nothing else 62fdd767 Fenghua Yu 2008-10-17 72 * (need to be careful not to touch addresses that may be 62fdd767 Fenghua Yu 2008-10-17 73 * unmapped). 62fdd767 Fenghua Yu 2008-10-17 74 * 62fdd767 Fenghua Yu 2008-10-17 75 * Note: "in0" and "in1" are preserved for debugging purposes. 62fdd767 Fenghua Yu 2008-10-17 76 */ 62fdd767 Fenghua Yu 2008-10-17 77 .section .kprobes.text,"ax" 62fdd767 Fenghua Yu 2008-10-17 78 GLOBAL_ENTRY(clflush_cache_range) 62fdd767 Fenghua Yu 2008-10-17 79 62fdd767 Fenghua Yu 2008-10-17 80 .prologue 62fdd767 Fenghua Yu 2008-10-17 81 alloc r2=ar.pfs,2,0,0,0 62fdd767 Fenghua Yu 2008-10-17 @82 movl r3=ia64_cache_stride_shift 62fdd767 Fenghua Yu 2008-10-17 83 mov r21=1 62fdd767 Fenghua Yu 2008-10-17 84 add r22=in1,in0 62fdd767 Fenghua Yu 2008-10-17 85 ;; :::::: The code at line 29 was first introduced by commit :::::: 08357f82d4decc48bbfd39ae30d5fe0754f7f576 [IA64] improve flush_icache_range() :::::: TO: Zoltan Menyhart <Zoltan.Menyhart@xxxxxxxx> :::::: CC: Tony Luck <tony.luck@xxxxxxxxx> --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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