On Thu, Mar 31, 2022 at 11:55 PM Qian Cai <quic_qiancai@xxxxxxxxxxx> wrote:
>
> On Fri, Mar 18, 2022 at 03:45:23PM +0800, Muchun Song wrote:
> > This series is based on next-20220225.
> >
> > Patch 1-2 fix a cache flush bug, because subsequent patches depend on
> > those on those changes, there are placed in this series. Patch 3-4
> > are preparation for fixing a dax bug in patch 5. Patch 6 is code cleanup
> > since the previous patch remove the usage of follow_invalidate_pte().
>
> Reverting this series fixed boot crashes.
>
> KASAN: null-ptr-deref in range [0x0000000000000018-0x000000000000001f]
> Mem abort info:
> ESR = 0x96000004
> EC = 0x25: DABT (current EL), IL = 32 bits
> SET = 0, FnV = 0
> EA = 0, S1PTW = 0
> FSC = 0x04: level 0 translation fault
> Data abort info:
> ISV = 0, ISS = 0x00000004
> CM = 0, WnR = 0
> [dfff800000000003] address between user and kernel address ranges
> Internal error: Oops: 96000004 [#1] PREEMPT SMP
> Modules linked in: cdc_ether usbnet ipmi_devintf ipmi_msghandler cppc_cpufreq fuse ip_tables x_tables ipv6 btrfs blake2b_generic libcrc32c xor xor_neon raid6_pq zstd_compress dm_mod nouveau crct10dif_ce drm_ttm_helper mlx5_core ttm drm_dp_helper drm_kms_helper nvme mpt3sas nvme_core xhci_pci raid_class drm xhci_pci_renesas
> CPU: 3 PID: 1707 Comm: systemd-udevd Not tainted 5.17.0-next-20220331-00004-g2d550916a6b9 #51
> pstate: 104000c9 (nzcV daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
> pc : __lock_acquire
> lr : lock_acquire.part.0
> sp : ffff800030a16fd0
> x29: ffff800030a16fd0 x28: ffffdd876c4e9f90 x27: 0000000000000018
> x26: 0000000000000000 x25: 0000000000000018 x24: 0000000000000000
> x23: ffff08022beacf00 x22: ffffdd8772507660 x21: 0000000000000000
> x20: 0000000000000000 x19: 0000000000000000 x18: ffffdd8772417d2c
> x17: ffffdd876c5bc2e0 x16: 1fffe100457d5b06 x15: 0000000000000094
> x14: 000000000000f1f1 x13: 00000000f3f3f3f3 x12: ffff08022beacf08
> x11: 1ffffbb0ee482fa5 x10: ffffdd8772417d28 x9 : 0000000000000000
> x8 : 0000000000000003 x7 : ffffdd876c4e9f90 x6 : 0000000000000000
> x5 : 0000000000000000 x4 : 0000000000000001 x3 : 0000000000000000
> x2 : 0000000000000000 x1 : 0000000000000003 x0 : dfff800000000000
> Call trace:
> __lock_acquire
> lock_acquire.part.0
> lock_acquire
> _raw_spin_lock
> page_vma_mapped_walk
> try_to_migrate_one
> rmap_walk_anon
> try_to_migrate
> __unmap_and_move
> unmap_and_move
> migrate_pages
> migrate_misplaced_page
> do_huge_pmd_numa_page
> __handle_mm_fault
> handle_mm_fault
> do_translation_fault
> do_mem_abort
> el0_da
> el0t_64_sync_handler
> el0t_64_sync
> Code: d65f03c0 d343ff61 d2d00000 f2fbffe0 (38e06820)
Hi,
I have found the root cause. It is because the implementation of
pmd_leaf() on arm64 is wrong. It didn't consider the PROT_NONE
mapped PMD, which does not match the expectation of pmd_leaf().
I'll send a fixed patch for arm64 like the following.
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 94e147e5456c..09eaae46a19b 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -535,7 +535,7 @@ extern pgprot_t phys_mem_access_prot(struct file
*file, unsigned long pfn,
PMD_TYPE_TABLE)
#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
PMD_TYPE_SECT)
-#define pmd_leaf(pmd) pmd_sect(pmd)
+#define pmd_leaf(pmd) (pmd_present(pmd) && !(pmd_val(pmd) &
PMD_TABLE_BIT))
#define pmd_bad(pmd) (!pmd_table(pmd))
#define pmd_leaf_size(pmd) (pmd_cont(pmd) ? CONT_PMD_SIZE : PMD_SIZE)
Thanks.
