On Sun, Sep 12 2021 at 21:37, Alexei Lozovsky wrote:
> On Sun, Sep 12, 2021, at 18:30, Alexey Dobriyan wrote:
>> How about making everything "unsigned long" or even "u64" like NIC
>> drivers do?
>
> I see some possible hurdles ahead:
>
> - Not all architectures have atomic operations for 64-bit values
This is not about atomics.
> All those "unsigned int" counters are incremented with __this_cpu_inc()
> which tries to use atomics if possible. Though, I'm not quite sure
It does not use atomics. It's a CPU local increment.
> how this works for read side which does not seem to use atomic reads
> at all. I guess, just by the virtue of properly aligned 32-bit reads
> being atomic everywhere? If that's so, I think widening counters to
> 64 bits will come with an asterisk.
The stats are accumulated racy, i.e. the interrupt might be handled and
one of the per cpu counters or irq_desc->tot_count might be incremented
concurrently.
On 32bit systems a 32bit load (as long as the compiler does not emit
load tearing) is always consistent even when there is a concurrent
increment going on. It either gets the old or the new value.
A 64bit read on a 32bit system is always two loads which means that a
concurrent increment will make it possible to observe a half updated
value. And no, you can't play reread tricks here without adding barriers
on weakly ordered architectures.
> - We'll need to update all counters to be 64-bit.
>
> Like, *everyone*. Every field that gets summed up needs to be 64-bit
> (or else wrap-arounds will be incorrect). Basically every counter in
> every irq_cpustat_t will need to become twice as wide. If that's
> a fine price to pay for accurate, full-width counters...
The storage size should not be a problem.
> So right now I don't see why it shouldn't be doable in theory.
So much for the theory :)
Thanks,
tglx
