On Fri, Jan 11, 2019 at 08:19:33PM +0100, Thomas Gleixner wrote:
> On Fri, 11 Jan 2019, Thomas Gleixner wrote:
> > --- a/kernel/irq/internals.h
> > +++ b/kernel/irq/internals.h
> > @@ -246,6 +246,7 @@ static inline void kstat_incr_irqs_this_
> > {
> > __this_cpu_inc(*desc->kstat_irqs);
> > __this_cpu_inc(kstat.irqs_sum);
> > + desc->tot_count++;
>
> There is one issue here. True percpu interrupts, like the timer interrupts
> on ARM(64), will access that in parallel. But that's not rocket science to
> fix.
I was wondering about that from an efficiency point of view. Since
interrupts are generally targetted to a single CPU, there's no cacheline
bouncing to speak of, except for interrupts like TLB shootdown on x86.
It might make sense for the percpu interrupts to still sum them at read
time, and not sum them at interrupt time.
