On Tue, 22 May 2018, Dave Hansen wrote: > On 05/22/2018 09:46 AM, Christopher Lameter wrote: > > On Tue, 22 May 2018, Dave Hansen wrote: > > > >> On 05/22/2018 09:05 AM, Boaz Harrosh wrote: > >>> How can we implement "Private memory"? > >> Per-cpu page tables would do it. > > We already have that for percpu subsystem. See alloc_percpu() > > I actually mean a set of page tables which is only ever installed on a > single CPU. The CPU is architecturally allowed to go load any PTE in > the page tables into the TLB any time it feels like. The only way to > keep a PTE from getting into the TLB is not ensure that a CPU never has > any access to it, and the only way to do that is to make sure that no > set of page tables it ever loads into CR3 have that PTE. > > As Peter said, it's possible, but not pretty. Well yeah its much more pretty if you use the segment register to avoid the page table tricks on x86. Other arches may rely on page table tricks. Regardless of that the percpu subsystem was created to provide "private" memory for each cpu and that may be the right starting point for adding "local" memory.
