On Mon, Oct 9, 2017 at 3:37 AM, Robin Murphy <robin.murphy@xxxxxxx> wrote: > Hi Dan, > > On 08/10/17 04:45, Dan Williams wrote: >> Add a dma-mapping api helper to retrieve the generic iommu_domain for a device. >> The motivation for this interface is making RDMA transfers to DAX mappings >> safe. If the DAX file's block map changes we need to be to reliably stop >> accesses to blocks that have been freed or re-assigned to a new file. > > ...which is also going to require some way to force the IOMMU drivers > (on x86 at least) to do a fully-synchronous unmap, instead of just > throwing the IOVA onto a flush queue to invalidate the TLBs at some > point in the future. Isn't that the difference between iommu_unmap() and iommu_unmap_fast()? As far as I can tell amd-iommu and intel-iommu both flush iotlbs on iommu_unmap() and don't support fast unmaps. > Assuming of course that there's an IOMMU both > present and performing DMA translation in the first place. That's why I want to call through the dma api to see if the iommu is being used to satisfy dma mappings. >> With the >> iommu_domain and a callback from the DAX filesystem the kernel can safely >> revoke access to a DMA device. The process that performed the RDMA memory >> registration is also notified of this revocation event, but the kernel can not >> otherwise be in the position of waiting for userspace to quiesce the device. > > OK, but why reinvent iommu_get_domain_for_dev()? How do I know if the iommu returned from that routine is the one being used for dma mapping operations for the device? Specifically, how would I discover that the result of dma_map_sg() can be passed as an IOVA range to iommu_unmap()? >> Since PMEM+DAX is currently only enabled for x86, we only update the x86 >> iommu drivers. > > Note in particular that those two drivers happen to be the *only* place > this approach could work - everyone else is going to have to fall back > to the generic IOMMU API function anyway. I want to make this functionality generic, but I'm not familiar with the iommu sub-system. How are dma mapping operations routed to the iommu driver in those other imlementations?
