Hi Conor, thanks for the quick response. On Fri, Feb 28, 2025 at 7:28 PM Conor Dooley <conor@xxxxxxxxxx> wrote: > > +description: | > > + Efinix FPGAs (Trion, Topaz, and Titanium families) support loading bitstreams > > + through "SPI Passive Mode". > > + Note 1: Only bus width 1x is supported. > > + Note 2: Additional pins hogs for bus width configuration must be set > > + elsewhere, if necessary. > > + Note 3: Topaz and Titanium support is based on documentation but remains > > + untested. > > Points 1 and 3 here seem to be driver limitations, and shouldn't really > be present in a document describing the hardware? > Yes, they are driver limitations and probably do not belong here. > > +properties: > > + compatible: > > + enum: > > + - efinix,trion-spi > > + - efinix,titanium-spi > > + - efinix,topaz-spi > > > + - efinix,fpga-spi > > What hardware does this device represent? Other ones are obvious matches > to the families you mention, but what is this one? The proposed compatible is a generic fallback for any Efinix FPGA Series. Regards Ian
