Hi Yilun, Please find my response inline. > -----Original Message----- > From: Xu Yilun <yilun.xu@xxxxxxxxxxxxxxx> > Sent: Monday, January 8, 2024 12:02 PM > To: Manne, Nava kishore <nava.kishore.manne@xxxxxxx> > Cc: mdf@xxxxxxxxxx; hao.wu@xxxxxxxxx; yilun.xu@xxxxxxxxx; > trix@xxxxxxxxxx; peter.colberg@xxxxxxxxx; conor.dooley@xxxxxxxxxxxxx; > v.georgiev@xxxxxxxxxxx; Simek, Michal <michal.simek@xxxxxxx>; Marco > Pagani <marpagan@xxxxxxxxxx>; gregkh@xxxxxxxxxxxxxxxxxxx; > ruanjinjie@xxxxxxxxxx; linux-fpga@xxxxxxxxxxxxxxx; linux- > kernel@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; git (AMD-Xilinx) > <git@xxxxxxx> > Subject: Re: [RFC] FPGA Subsystem User Space Interface Proposal > > On Thu, Jan 04, 2024 at 04:52:15AM +0000, Manne, Nava kishore wrote: > > > ================================================================ > ====== > > = > > | Introduction | > > > ================================================================ > ====== > > = This document provides a detailed overview of the proposed Kernel > > feature for FPGA Manager subsystem user interface. > > It describes the problem statement behind the proposal, the problem to be > solved, a top-level solution design. > > > > Table of Contents: > > ------------------ > > A. Problem Statement and Background > > B. Scope and Out of scope of the proposal > > B.1 Scope > > B.2 Out of scope > > C. Proposed Solution > > D. Proposed User Interface Details > > > ================================================================ > ====== > > = > > | A. Problem Statement and Background | > > > ================================================================ > ====== > > = The existing FPGA manager subsystem didn't have any user space > > interface (other than the status/state in sysfs) in Kernel. > > Basically, FPGAs are semiconductor devices that can be reprogrammed for > desired hardware functionality. > > FPGAs can be reprogrammed at runtime with different types of logic and IPs > as per user need and hence there is a need to use device tree overlays for > removing/updating/adding the devices at runtime for the IPs/controllers that > are present in FPGA. > > But we don't have any user interface in kernel for updating the device tree > at runtime. > > > > Sometime back there was a series sent by Pantelis Antoniou > (https://lore.kernel.org/lkml/1414528565-10907-4-git-send-email- > pantelis.antoniou@xxxxxxxxxxxx/). > > This patch introduced a user interface configfs for Device Tree overlays, a > method of dynamically altering the kernel's live Device Tree. However, this > patch series was not accepted in mainline due to various concerns. > > For more details refer to this link: > > > https://elinux.org/Frank%27s_Evolving_Overlay_Thoughts#issues_and_what > > _needs_to_be_completed_--_Not_an_exhaustive_list > > > > One of the major valid concerns that were raised with this configfs interface > was security as it opens up the interface to users for modifying the live device > tree. > > > > So, in order to configure/program the FPGA devices, All the major > > vendors of FPGA are using this configfs series as out-of-tree patch for > configuring the FPGAs and there was never an attempt to introduce a generic > interface to configure/program the FPGA in upstream and hence upstream > kernel ended up in not having proper support for FPGAs. > > > > The proposal below tries to address this gap of FPGA programmability by > providing an interface to the user. > > > > > ================================================================ > ====== > > = > > | B. Proposed Solution | > > > ================================================================ > ====== > > = The proposed interface adds a new sysfs interface (of-fpga-region.c) > > as part of the fpga subsystem and it is responsible for supporting the below > functionalities. > > Why only for of-fpga-region? There are also FPGA regions that don't rely on > OF. My quick idea is that an interface for /sys/class/fpga-region/ and OF could > be one of the implementation. > I agree, few devices(Like - dfl-fme-region.c) are rely only on FPGA region and they are not using OF. Thanks for pointing out this case. I will look at the possibility of having a generic interface for both Fpga region and OF and I will get back to you soon. Regards, Navakishore.
