On Tue, Mar 28, 2023 at 10:24:55AM -0400, Tianfei Zhang wrote: > Adding a DFL (Device Feature List) device driver of ToD device for > Intel FPGA cards. > > The Intel FPGA Time of Day(ToD) IP within the FPGA DFL bus is exposed > as PTP Hardware clock(PHC) device to the Linux PTP stack to synchronize > the system clock to its ToD information using phc2sys utility of the > Linux PTP stack. The DFL is a hardware List within FPGA, which defines > a linked list of feature headers within the device MMIO space to provide > an extensible way of adding subdevice features. > > Signed-off-by: Raghavendra Khadatare <raghavendrax.anand.khadatare@xxxxxxxxx> > Signed-off-by: Tianfei Zhang <tianfei.zhang@xxxxxxxxx> Acked-by: Richard Cochran <richardcochran@xxxxxxxxx>
