On 2022-09-26 at 17:39:23 +0300, Ivan Bornyakov wrote:
> Add support to the FPGA manager for programming Lattice ECP5 FPGA over
> slave SPI sysCONFIG interface.
>
> sysCONFIG interface core functionality is separate from both ECP5 and
> SPI specifics, so support for other FPGAs with different port types can
> be added in the future.
>
> Signed-off-by: Ivan Bornyakov <i.bornyakov@xxxxxxxxxxx>
> ---
> drivers/fpga/Kconfig | 11 +
> drivers/fpga/Makefile | 2 +
> drivers/fpga/lattice-sysconfig-spi.c | 151 ++++++++++
> drivers/fpga/lattice-sysconfig.c | 428 +++++++++++++++++++++++++++
> drivers/fpga/lattice-sysconfig.h | 41 +++
> 5 files changed, 633 insertions(+)
> create mode 100644 drivers/fpga/lattice-sysconfig-spi.c
> create mode 100644 drivers/fpga/lattice-sysconfig.c
> create mode 100644 drivers/fpga/lattice-sysconfig.h
>
> diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
> index 6c416955da53..d1a8107fdcb3 100644
> --- a/drivers/fpga/Kconfig
> +++ b/drivers/fpga/Kconfig
> @@ -263,4 +263,15 @@ config FPGA_MGR_MICROCHIP_SPI
> programming over slave SPI interface with .dat formatted
> bitstream image.
>
> +config FPGA_MGR_LATTICE_SYSCONFIG
> + tristate
> +
> +config FPGA_MGR_LATTICE_SYSCONFIG_SPI
> + tristate "Lattice sysCONFIG SPI FPGA manager"
> + depends on SPI
> + select FPGA_MGR_LATTICE_SYSCONFIG
> + help
> + FPGA manager driver support for Lattice FPGAs programming over slave
> + SPI sysCONFIG interface.
> +
> endif # FPGA
> diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
> index 42ae8b58abce..72e554b4d2f7 100644
> --- a/drivers/fpga/Makefile
> +++ b/drivers/fpga/Makefile
> @@ -20,6 +20,8 @@ obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o
> obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o
> obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o
> obj-$(CONFIG_FPGA_MGR_MICROCHIP_SPI) += microchip-spi.o
> +obj-$(CONFIG_FPGA_MGR_LATTICE_SYSCONFIG) += lattice-sysconfig.o
> +obj-$(CONFIG_FPGA_MGR_LATTICE_SYSCONFIG_SPI) += lattice-sysconfig-spi.o
> obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
> obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
>
> diff --git a/drivers/fpga/lattice-sysconfig-spi.c b/drivers/fpga/lattice-sysconfig-spi.c
> new file mode 100644
> index 000000000000..1428705ae7d1
> --- /dev/null
> +++ b/drivers/fpga/lattice-sysconfig-spi.c
> @@ -0,0 +1,151 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Lattice FPGA programming over slave SPI sysCONFIG interface.
> + */
> +
> +#include <linux/spi/spi.h>
> +
> +#include "lattice-sysconfig.h"
> +
> +static const u32 ecp5_spi_max_speed_hz = 60000000;
> +
> +static int sysconfig_spi_cmd_write(struct sysconfig_priv *priv,
> + const void *tx_buf, size_t tx_len)
> +{
> + struct spi_device *spi = to_spi_device(priv->dev);
> +
> + return spi_write(spi, tx_buf, tx_len);
> +}
> +
> +static int sysconfig_spi_cmd_read(struct sysconfig_priv *priv,
> + const void *tx_buf, size_t tx_len,
> + void *rx_buf, size_t rx_len)
> +{
> + struct spi_device *spi = to_spi_device(priv->dev);
> +
> + return spi_write_then_read(spi, tx_buf, tx_len, rx_buf, rx_len);
> +}
> +
> +static int sysconfig_spi_bitstream_burst_init(struct sysconfig_priv *priv)
> +{
> + const u8 lsc_bitstream_burst[] = SYSCONFIG_LSC_BITSTREAM_BURST;
> + struct spi_device *spi = to_spi_device(priv->dev);
> + struct spi_transfer xfer = {
> + .tx_buf = lsc_bitstream_burst,
> + .len = sizeof(lsc_bitstream_burst),
> + .cs_change = 1,
> + };
> + struct spi_message msg;
> + int ret;
> +
> + spi_message_init_with_transfers(&msg, &xfer, 1);
> +
> + /*
> + * Lock SPI bus for exclusive usage until FPGA programming is done.
> + * SPI bus will be released in sysconfig_spi_bitstream_burst_complete().
> + */
> + spi_bus_lock(spi->controller);
> +
> + ret = spi_sync_locked(spi, &msg);
> + if (ret)
> + spi_bus_unlock(spi->controller);
> +
> + return ret;
> +}
> +
> +static int sysconfig_spi_bitstream_burst_write(struct sysconfig_priv *priv,
> + const char *buf, size_t len)
> +{
> + struct spi_device *spi = to_spi_device(priv->dev);
> + struct spi_transfer xfer = {
> + .tx_buf = buf,
> + .len = len,
> + .cs_change = 1,
> + };
> + struct spi_message msg;
> +
> + spi_message_init_with_transfers(&msg, &xfer, 1);
> +
> + return spi_sync_locked(spi, &msg);
> +}
> +
> +static int sysconfig_spi_bitstream_burst_complete(struct sysconfig_priv *priv)
> +{
> + struct spi_device *spi = to_spi_device(priv->dev);
> +
> + /* Bitstream burst write is done, release SPI bus */
> + spi_bus_unlock(spi->controller);
> +
> + /* Toggle CS to finish bitstream write */
> + return spi_write(spi, NULL, 0);
> +}
> +
> +static int sysconfig_spi_probe(struct spi_device *spi)
> +{
> + const struct spi_device_id *dev_id;
> + struct device *dev = &spi->dev;
> + struct sysconfig_priv *priv;
> + const u32 *spi_max_speed;
> +
> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + spi_max_speed = device_get_match_data(dev);
> + if (!spi_max_speed) {
> + dev_id = spi_get_device_id(spi);
> + if (!dev_id)
> + return -ENODEV;
> +
> + spi_max_speed = (const u32 *)dev_id->driver_data;
> + }
> +
> + if (!spi_max_speed)
> + return -EINVAL;
> +
> + if (spi->max_speed_hz > *spi_max_speed) {
> + dev_err(dev, "SPI speed %u is too high, maximum speed is %u\n",
> + spi->max_speed_hz, *spi_max_speed);
> + return -EINVAL;
> + }
> +
> + priv->dev = dev;
> + priv->command_write = sysconfig_spi_cmd_write;
> + priv->command_read = sysconfig_spi_cmd_read;
> + priv->bitstream_burst_write_init = sysconfig_spi_bitstream_burst_init;
> + priv->bitstream_burst_write = sysconfig_spi_bitstream_burst_write;
> + priv->bitstream_burst_write_complete = sysconfig_spi_bitstream_burst_complete;
> +
> + return sysconfig_probe(priv);
> +}
> +
> +static const struct spi_device_id sysconfig_spi_ids[] = {
> + {
> + .name = "sysconfig-ecp5",
> + .driver_data = (kernel_ulong_t)&ecp5_spi_max_speed_hz,
> + }, {},
> +};
> +MODULE_DEVICE_TABLE(spi, sysconfig_spi_ids);
> +
> +#if IS_ENABLED(CONFIG_OF)
> +static const struct of_device_id sysconfig_of_ids[] = {
> + {
> + .compatible = "lattice,sysconfig-ecp5",
> + .data = &ecp5_spi_max_speed_hz,
> + }, {},
> +};
> +MODULE_DEVICE_TABLE(of, sysconfig_of_ids);
> +#endif /* IS_ENABLED(CONFIG_OF) */
> +
> +static struct spi_driver lattice_sysconfig_driver = {
> + .probe = sysconfig_spi_probe,
> + .id_table = sysconfig_spi_ids,
> + .driver = {
> + .name = "lattice_sysconfig_spi_fpga_mgr",
> + .of_match_table = of_match_ptr(sysconfig_of_ids),
> + },
> +};
> +module_spi_driver(lattice_sysconfig_driver);
> +
> +MODULE_DESCRIPTION("Lattice sysCONFIG Slave SPI FPGA Manager");
> +MODULE_LICENSE("GPL");
> diff --git a/drivers/fpga/lattice-sysconfig.c b/drivers/fpga/lattice-sysconfig.c
> new file mode 100644
> index 000000000000..f9acff1ab122
> --- /dev/null
> +++ b/drivers/fpga/lattice-sysconfig.c
> @@ -0,0 +1,428 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Lattice FPGA sysCONFIG interface functions independent of port type.
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/fpga/fpga-mgr.h>
> +#include <linux/gpio/consumer.h>
> +
> +#include "lattice-sysconfig.h"
> +
> +static int sysconfig_cmd_write(struct sysconfig_priv *priv, const void *buf,
> + size_t buf_len)
> +{
> + return priv->command_write(priv, buf, buf_len);
> +}
> +
> +static int sysconfig_cmd_read(struct sysconfig_priv *priv, const void *tx_buf,
> + size_t tx_len, void *rx_buf, size_t rx_len)
> +{
> + return priv->command_read(priv, tx_buf, tx_len, rx_buf, rx_len);
> +}
> +
> +static int sysconfig_read_busy(struct sysconfig_priv *priv)
> +{
> + const u8 lsc_check_busy[] = SYSCONFIG_LSC_CHECK_BUSY;
> + u8 busy;
> + int ret;
> +
> + ret = sysconfig_cmd_read(priv, lsc_check_busy, sizeof(lsc_check_busy),
> + &busy, sizeof(busy));
> +
> + return ret ? : busy;
> +}
> +
> +static int sysconfig_poll_busy(struct sysconfig_priv *priv)
> +{
> + unsigned long timeout;
> + int ret;
> +
> + timeout = jiffies + msecs_to_jiffies(SYSCONFIG_POLL_BUSY_TIMEOUT_MS);
> +
> + while (time_before(jiffies, timeout)) {
> + ret = sysconfig_read_busy(priv);
> + if (ret <= 0)
> + return ret;
> +
> + usleep_range(SYSCONFIG_POLL_INTERVAL_US,
> + SYSCONFIG_POLL_INTERVAL_US * 2);
> + }
> +
> + return -EBUSY;
return -ETIMEDOUT? To be aligned with sysconfig_poll_gpio.
Others look good to me.
Thanks,
Yilun
