Refactor the spi transfer preparation into a separate function. This
commit prepares moving the non-spi-specific part of the programming
sequence into a separate file.
Signed-off-by: Johannes Zink <j.zink@xxxxxxxxxxxxxx>
---
drivers/fpga/machxo2-spi.c | 128 +++++++++++++++++++++++--------------
1 file changed, 79 insertions(+), 49 deletions(-)
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
index 7f7d1066ddee..d696b1cfb18a 100644
--- a/drivers/fpga/machxo2-spi.c
+++ b/drivers/fpga/machxo2-spi.c
@@ -65,7 +65,7 @@ static inline u8 get_err(u32 status)
static int get_status(struct spi_device *spi, u32 *status)
{
struct spi_transfer transfers[2] = {};
- static const u8 cmd[] = LSC_READ_STATUS;
+ u8 cmd[] = LSC_READ_STATUS;
__be32 tmp;
int ret;
@@ -107,7 +107,7 @@ static void dump_status_reg(u32 status)
!!FIELD_GET(MACHXO2_DVER, status), get_err_string(get_err(status)));
}
-static int wait_until_not_busy(struct spi_device *spi)
+static int machxo2_wait_until_not_busy(struct spi_device *spi)
{
u32 status;
int ret, loop = 0;
@@ -123,29 +123,57 @@ static int wait_until_not_busy(struct spi_device *spi)
return 0;
}
+struct machxo2_cmd {
+ u8 *cmd;
+ size_t cmd_len;
+ u16 delay_us;
+};
+
+static int machxo2_write_spi(struct spi_device *spi, struct machxo2_cmd *cmds, size_t cmd_count)
+{
+ struct spi_transfer *transfers;
+ int i, ret;
+
+ transfers = kcalloc(cmd_count, sizeof(*transfers), GFP_KERNEL);
+ for (i = 0; i < cmd_count; i++) {
+ transfers[i].tx_buf = cmds[i].cmd;
+ transfers[i].len = cmds[i].cmd_len;
+
+ if (cmds[i].delay_us) {
+ transfers[i].delay.value = cmds[i].delay_us;
+ transfers[i].delay.unit = SPI_DELAY_UNIT_USECS;
+ }
+ }
+
+ ret = spi_sync_transfer(spi, transfers, cmd_count);
+
+ kfree(transfers);
+
+ return ret;
+}
+
static int machxo2_cleanup(struct fpga_manager *mgr)
{
struct spi_device *spi = mgr->priv;
- static const u8 erase[] = ISC_ERASE;
- static const u8 refresh[] = LSC_REFRESH;
- struct spi_transfer tx = {};
+ u8 erase[] = ISC_ERASE;
+ u8 refresh[] = LSC_REFRESH;
+ struct machxo2_cmd cmd = {};
int ret;
- tx.tx_buf = &erase;
- tx.len = sizeof(erase);
- ret = spi_sync_transfer(spi, &tx, 1);
+ cmd.cmd = erase;
+ cmd.cmd_len = sizeof(erase);
+ ret = machxo2_write_spi(spi, &cmd, 1);
if (ret)
goto fail;
- ret = wait_until_not_busy(spi);
+ ret = machxo2_wait_until_not_busy(spi);
if (ret)
goto fail;
- tx.tx_buf = &refresh;
- tx.len = sizeof(refresh);
- tx.delay.value = MACHXO2_REFRESH_USEC;
- tx.delay.unit = SPI_DELAY_UNIT_USECS;
- ret = spi_sync_transfer(spi, &tx, 1);
+ cmd.cmd = refresh;
+ cmd.cmd_len = sizeof(refresh);
+ cmd.delay_us = MACHXO2_REFRESH_USEC;
+ ret = machxo2_write_spi(spi, &cmd, 1);
if (ret)
goto fail;
@@ -179,10 +207,10 @@ static int machxo2_write_init(struct fpga_manager *mgr,
const char *buf, size_t count)
{
struct spi_device *spi = mgr->priv;
- struct spi_transfer tx[2] = {};
- static const u8 enable[] = ISC_ENABLE;
- static const u8 erase[] = ISC_ERASE;
- static const u8 initaddr[] = LSC_INITADDRESS;
+ u8 enable[] = ISC_ENABLE;
+ u8 erase[] = ISC_ERASE;
+ u8 initaddr[] = LSC_INITADDRESS;
+ struct machxo2_cmd cmd[2] = {};
u32 status;
int ret;
@@ -195,18 +223,18 @@ static int machxo2_write_init(struct fpga_manager *mgr,
get_status(spi, &status);
dump_status_reg(status);
- tx[0].tx_buf = &enable;
- tx[0].len = sizeof(enable);
- tx[0].delay.value = MACHXO2_LOW_DELAY_USEC;
- tx[0].delay.unit = SPI_DELAY_UNIT_USECS;
+ cmd[0].cmd = enable;
+ cmd[0].cmd_len = sizeof(enable);
+ cmd[0].delay_us = MACHXO2_LOW_DELAY_USEC;
+
+ cmd[1].cmd = erase;
+ cmd[1].cmd_len = sizeof(erase);
+ ret = machxo2_write_spi(spi, cmd, ARRAY_SIZE(cmd));
- tx[1].tx_buf = &erase;
- tx[1].len = sizeof(erase);
- ret = spi_sync_transfer(spi, tx, ARRAY_SIZE(tx));
if (ret)
goto fail;
- ret = wait_until_not_busy(spi);
+ ret = machxo2_wait_until_not_busy(spi);
if (ret)
goto fail;
@@ -217,9 +245,9 @@ static int machxo2_write_init(struct fpga_manager *mgr,
}
dump_status_reg(status);
- tx[0].tx_buf = &initaddr;
- tx[0].len = sizeof(initaddr);
- ret = spi_sync_transfer(spi, &tx[0], 1);
+ cmd[0].cmd = initaddr;
+ cmd[0].cmd_len = sizeof(initaddr);
+ ret = machxo2_write_spi(spi, &cmd[0], 1);
if (ret)
goto fail;
@@ -237,8 +265,9 @@ static int machxo2_write(struct fpga_manager *mgr, const char *buf,
size_t count)
{
struct spi_device *spi = mgr->priv;
- static const u8 progincr[] = LSC_PROGINCRNV;
+ u8 progincr[] = LSC_PROGINCRNV;
u8 payload[MACHXO2_BUF_SIZE];
+ struct machxo2_cmd cmd = {};
u32 status;
int i, ret;
@@ -248,17 +277,19 @@ static int machxo2_write(struct fpga_manager *mgr, const char *buf,
}
get_status(spi, &status);
dump_status_reg(status);
+
+ cmd.cmd = payload;
+ cmd.cmd_len = MACHXO2_BUF_SIZE;
+ cmd.delay_us = MACHXO2_HIGH_DELAY_USEC;
+
memcpy(payload, &progincr, sizeof(progincr));
for (i = 0; i < count; i += MACHXO2_PAGE_SIZE) {
- struct spi_transfer tx = {};
-
memcpy(&payload[sizeof(progincr)], &buf[i], MACHXO2_PAGE_SIZE);
- tx.tx_buf = payload;
- tx.len = MACHXO2_BUF_SIZE;
- tx.delay.value = MACHXO2_HIGH_DELAY_USEC;
- tx.delay.unit = SPI_DELAY_UNIT_USECS;
- ret = spi_sync_transfer(spi, &tx, 1);
+ cmd.cmd = payload;
+ cmd.cmd_len = MACHXO2_BUF_SIZE;
+ cmd.delay_us = MACHXO2_HIGH_DELAY_USEC;
+ ret = machxo2_write_spi(spi, &cmd, 1);
if (ret) {
dev_err(&mgr->dev, "Error loading the bitstream.\n");
return ret;
@@ -274,18 +305,18 @@ static int machxo2_write_complete(struct fpga_manager *mgr,
struct fpga_image_info *info)
{
struct spi_device *spi = mgr->priv;
- struct spi_transfer tx = {};
- static const u8 progdone[] = ISC_PROGRAMDONE;
- static const u8 refresh[] = LSC_REFRESH;
+ struct machxo2_cmd cmd = {};
+ u8 progdone[] = ISC_PROGRAMDONE;
+ u8 refresh[] = LSC_REFRESH;
u32 status;
int ret, refreshloop = 0;
- tx.tx_buf = &progdone;
- tx.len = sizeof(progdone);
- ret = spi_sync_transfer(spi, &tx, 1);
+ cmd.cmd = progdone;
+ cmd.cmd_len = sizeof(progdone);
+ ret = machxo2_write_spi(spi, &cmd, 1);
if (ret)
goto fail;
- ret = wait_until_not_busy(spi);
+ ret = machxo2_wait_until_not_busy(spi);
if (ret)
goto fail;
@@ -297,13 +328,12 @@ static int machxo2_write_complete(struct fpga_manager *mgr,
goto fail;
}
- tx.tx_buf = &refresh;
- tx.len = sizeof(refresh);
- tx.delay.value = MACHXO2_REFRESH_USEC;
- tx.delay.unit = SPI_DELAY_UNIT_USECS;
+ cmd.cmd = refresh;
+ cmd.cmd_len = sizeof(refresh);
+ cmd.delay_us = MACHXO2_REFRESH_USEC;
do {
- ret = spi_sync_transfer(spi, &tx, 1);
+ ret = machxo2_write_spi(spi, &cmd, 1);
if (ret)
goto fail;
--
2.30.2
