On 13/07/2022 15:03, Tianfei Zhang wrote: > From: Debarati Biswas <debaratix.biswas@xxxxxxxxx> > > The next generation (revision 1) of the DFL EMIF feature device requires > support for more than 4 memory banks. It does not support the selective > clearing of memory banks. A capability register replaces the previous > control register, and contains a bitmask to indicate the presence of each > memory bank. This bitmask aligns with the previous control register > bitmask that served the same purpose. The control and capability > registers are treated like a C Union structure in order to support both > the new and old revisions of the EMIF device. > > Signed-off-by: Debarati Biswas <debaratix.biswas@xxxxxxxxx> > Signed-off-by: Russ Weight <russell.h.weight@xxxxxxxxx> > Signed-off-by: Tianfei Zhang <tianfei.zhang@xxxxxxxxx> > --- Thanks for the patch and for the review. It is too late in the cycle for me to pick it up. I will take it after the merge window. Best regards, Krzysztof
