RE: [PATCH v6 2/2] Documentation: fpga: dfl: add description of feature ids

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> On Tue, 12 Apr 2022, Tianfei Zhang wrote:
> 
> > From: Tianfei zhang <tianfei.zhang@xxxxxxxxx>
> >
> > This patch adds the description of feature id table in documentation.

Please fix the title and commit message per your current modification as well.

> >
> > Signed-off-by: Tianfei zhang <tianfei.zhang@xxxxxxxxx>
> 
> Hi Tianfei,
> 
> Reviewed-by: Matthew Gerlach <matthew.gerlach@xxxxxxxxxxxxxxx>
> > ---
> > v6: fix documentation from Hao's comment.
> > v5: fix documentation from Matthew's comment.
> > ---
> > Documentation/fpga/dfl.rst | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> > index ef9eec71f6f3..15b670926084 100644
> > --- a/Documentation/fpga/dfl.rst
> > +++ b/Documentation/fpga/dfl.rst
> > @@ -502,6 +502,11 @@ Developer only needs to provide a sub feature driver
> with matched feature id.
> > FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c)
> > could be a reference.
> >
> > +Please refer to below link to existing feature id table and guide for new
> feature
> > +ids application.
> > +https://github.com/OPAE/dfl-feature-id
> > +
> > +
> > Location of DFLs on a PCI Device
> > ================================
> > The original method for finding a DFL on a PCI device assumed the start of the
> > --
> > 2.26.2
> >
> >




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