On Sat, Apr 16, 2022 at 07:07:15PM +0530, Nava kishore Manne wrote:
> zynq_fpga_has_sync () API is expecting "u8 *" but the
> formal parameter that was passed is of type "const char *".
> fixes this issue by changing the buf type to "const char *"
>
> This patch will also update zynq_fpga_has_sync () API description
> to align with API functionality.
>
> Signed-off-by: Nava kishore Manne <nava.manne@xxxxxxxxxx>
> ---
> Changes for v2:
> -None.
> Changes for v3:
> - Changed arg buf type to "const char *" as suggested by Tom.
> - update zynq_fpga_has_sync () API description to align with API
> functionality.
> Changes for v4:
> - None.
There are some minor comments in v3, please check it.
Thanks,
Yilun
>
> drivers/fpga/zynq-fpga.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c
> index 426aa34c6a0d..ada07eea64bc 100644
> --- a/drivers/fpga/zynq-fpga.c
> +++ b/drivers/fpga/zynq-fpga.c
> @@ -235,11 +235,11 @@ static irqreturn_t zynq_fpga_isr(int irq, void *data)
> return IRQ_HANDLED;
> }
>
> -/* Sanity check the proposed bitstream. It must start with the sync word in
> - * the correct byte order, and be dword aligned. The input is a Xilinx .bin
> - * file with every 32 bit quantity swapped.
> +/* Sanity check the proposed bitstream. The sync word must be found in the
> + * correct byte order and it should be dword aligned. The input is a
> + * Xilinx.bin file with every 32 bit quantity swapped.
> */
> -static bool zynq_fpga_has_sync(const u8 *buf, size_t count)
> +static bool zynq_fpga_has_sync(const char *buf, size_t count)
> {
> for (; count >= 4; buf += 4, count -= 4)
> if (buf[0] == 0x66 && buf[1] == 0x55 && buf[2] == 0x99 &&
> --
> 2.25.1
