This is v2 patchset adding IOFS (Intel Open FPGA stack) support for
DFL driver. IOFS is Intel's version of a common core set of
RTL to allow customers to easily interface to logic and IP
on the FPGA. IOFS leverages the DFL for the implementation of
the FPGA RTL design.
Patch 1, allows for ports without specific bar space.
Patch 2, introduces features in dfl_fpga_cdev after DFL enumeration.
On IOFS, we will add more extensions or features in DFL in
future, so adding a new member "features"in dfl_fpga_cdev.
Patch 3, fixs VF creation in "Multiple VFs per PR slot" and legacy model.
Patch 4, handles dfl's starting with AFU and allows for VFs to be created.
Patch 5, adds architecture description about IOFS support for DFL
in documentation.
Changelog v1 -> v2:
- Introducing a new member "features" in dfl_fpga_cdev for feature
control.
- Adding new flag DFL_FEAT_PORT_CONNECTED_AFU for IOFS legacy model.
- Updates the documentation for the access models about AFU in IOFS.
- Drop the PCI PID patch and will send it later.
Matthew Gerlach (2):
fpga: dfl: Allow for ports without specific bar space.
fpga: dfl: Handle dfl's starting with AFU
Tianfei zhang (3):
fpga: dfl: add features in dfl_fpga_cdev
fpga: dfl: fix VF creation in IOFS
Documentation: fpga: dfl: add description of IOFS
Documentation/fpga/dfl.rst | 113 +++++++++++++++++++++++++++++++++++++
drivers/fpga/dfl-pci.c | 13 ++++-
drivers/fpga/dfl.c | 38 ++++++++-----
drivers/fpga/dfl.h | 6 ++
4 files changed, 155 insertions(+), 15 deletions(-)
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2.26.2
