Hi, Yilun.
On Sat, Feb 19, 2022 at 12:05:55AM +0800, Xu Yilun wrote:
> On Thu, Feb 17, 2022 at 10:18:51PM +0300, Ivan Bornyakov wrote:
> > +static int mpf_ops_write(struct fpga_manager *mgr, const char *buf, size_t count)
> > +{
> > + ssize_t bitstream_start = 0, bitstream_size;
> > + struct mpf_priv *priv = mgr->priv;
> > + struct spi_device *spi = priv->spi;
> > + struct device *dev = &mgr->dev;
> > + u8 tmp_buf[SPI_FRAME_SIZE + 1];
> > + int ret, i;
> > +
> > + if (crc_ccitt(0, buf, count)) {
> > + dev_err(dev, "CRC error\n");
> > +
> > + return -EINVAL;
> > + }
> > +
> > + bitstream_start = lookup_block_start(BITSTREAM_ID, buf, count);
> > + if (bitstream_start < 0) {
> > + dev_err(dev, "Failed to find bitstream start %zd\n",
> > + bitstream_start);
> > +
> > + return bitstream_start;
> > + }
> > +
> > + bitstream_size = parse_bitstream_size(buf, count);
> > + if (bitstream_size < 0) {
> > + dev_err(dev, "Failed to parse bitstream size %zd\n",
> > + bitstream_size);
> > +
> > + return bitstream_size;
> > + }
> > +
> > + if (bitstream_start + bitstream_size * SPI_FRAME_SIZE > count) {
> > + dev_err(dev,
> > + "Bitstram outruns firmware. Bitstream start %zd, bitstream size %zd, firmware size %zu\n",
>
> Bitstream
>
> > + bitstream_start, bitstream_size * SPI_FRAME_SIZE, count);
> > +
> > + return -EFAULT;
> > + }
> > +
>
> If I understand right, this function assumes the users provide the
> entire image buffer. But it is possible the image buffer is from a
> scatter list and the callback would be called several times.
>
That is unfortunate. I thought fpga_manager_ops->write_sg() is here for
that purpose.
>
> Maybe the bitstream info at the head of the image could be parsed in
> write_init(), and this requires the driver fill the
> fpga_manager_ops.initial_header_size
>
Header size is not known beforehand and is stored in 25th byte of the
image.
Overall, thanks for detailed review
