From: Appana Durga Kedareswara rao <appana.durga.rao@xxxxxxxxxx>
This patch adds binding doc for versal fpga manager driver.
Signed-off-by: Nava kishore Manne <nava.manne@xxxxxxxxxx>
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xxxxxxxxxx>
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
---
Changes for v2:
-Fixed file format and syntax issues.
Changes for v3:
-Removed unwated extra spaces.
Changes for v4:
-Rebased the changes on linux-next.
No functional changes
Changes for v5:
-Updated fpga node name to versal_fpga.
Changes for v6:
-None.
Changes for v7:
-None.
Changes for v8:
-None.
.../bindings/fpga/xlnx,versal-fpga.yaml | 33 +++++++++++++++++++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
diff --git a/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
new file mode 100644
index 000000000000..ac6a207278d5
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/xlnx,versal-fpga.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx Versal FPGA driver.
+
+maintainers:
+ - Nava kishore Manne <nava.manne@xxxxxxxxxx>
+
+description: |
+ Device Tree Versal FPGA bindings for the Versal SoC, controlled
+ using firmware interface.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - xlnx,versal-fpga
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ versal_fpga: versal_fpga {
+ compatible = "xlnx,versal-fpga";
+ };
+
+...
--
2.17.1
