Hi Christoph,
On Wed, May 01, 2019 at 07:49:05PM +0200, Christoph Hellwig wrote:
> On Wed, May 01, 2019 at 05:40:34PM +0000, Paul Burton wrote:
> > > > If it is necessary then as-is this code will clear the allocated memory
> > > > using uncached writes which will be pretty slow. It would be much more
> > > > efficient to perform the memset before arch_dma_prep_coherent() & before
> > > > converting ret to an uncached address.
> > >
> > > Yes, we could do that.
> >
> > Great; using cached writes would match the existing MIPS behavior.
>
> Can you test the stack with the two updated patches and ack them if
> they are fine? That would allow getting at least the infrastructure
> and mips in for this merge window.
Did you send a v2 of this patch?
If so it hasn't showed up in my inbox, nor on the linux-mips archive on
lore.kernel.org.
Thanks,
Paul
