On Tue, 2012-06-26 at 15:06 +0530, Archit Taneja wrote: > Some panel timing related fields are contained in omap_panel_config in the form > of flags. The fields are: > > - Hsync logic level > - Vsync logic level > - Data driven on rising/falling edge of pixel clock > - Output enable/Data enable logic level > - HSYNC/VSYNC driven on rising/falling edge of pixel clock > > Out of these parameters, Hsync and Vsync logic levels are a part of the timings > in the Xorg modeline configuration. So it makes sense to move the to > omap_video_timings. The rest aren't a part of modeline, but it still makes > sense to move these since they are related to panel timings. > > These fields stored in omap_panel_config in dssdev are configured for LCD > panels, and the corresponding LCD managers in the DISPC_POL_FREQo registers. > > Add the above fields in omap_video_timings. Represent their state via new enums. > The parameter pclk_edge is configured via omap_dss_signal_level, however it > actually configures whether data is driven on the rising or falling edge. This > is a bit unclean, but it prevents us from creating another enum. Hmm, why can't omap_dss_signal_edge be used for pclk_edge? I think it'd fit fine, except OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES would be an illegal value for it. Tomi
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