2010/7/6 Guennadi Liakhovetski <g.liakhovetski@xxxxxx>: > On Mon, 5 Jul 2010, Magnus Damm wrote: >> On Fri, Jul 2, 2010 at 9:33 PM, Guennadi Liakhovetski >> <g.liakhovetski@xxxxxx> wrote: >> > On Fri, 2 Jul 2010, Magnus Damm wrote: >> >> On Wed, Jun 30, 2010 at 6:55 PM, Guennadi Liakhovetski >> >> <g.liakhovetski@xxxxxx> wrote: >> >> > Add definitions for DV_CLKI and HDMI clocks, extend support for PLLC2 and some >> >> > other clocks. >> >> > >> >> > Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@xxxxxx> >> >> > + ═ ═ ═ /* >> >> > + ═ ═ ═ ═* TODO: If the PLL is off, mult should be == 1, but the clock must be >> >> > + ═ ═ ═ ═* stopped during re-parenting, a better solution to this conflict >> >> > + ═ ═ ═ ═* should be found. >> >> > + ═ ═ ═ ═*/ >> >> > + ═ ═ ═ mult = (((__raw_readl(PLLC2CR) >> 24) & 0x3f) + 1) * 2; >> >> >> >> Yes, this needs to be fixed. >> > >> > You mean now or in the future? If now - I don't see a reasonable fix so >> > far... Do you? >> >> I'm not sure which way is the best, but I think this patch breaks the >> case when the PLL is turned off. > > Ok, I can re-add the test and just add a line > > clk->rate = pllc2_recalc(clk); > > in pllc2_enable()? This even makes sense in a way - if we know, that > after enabling the ->rate can get out of sync with the actual frequency... > I'll prepare an updated patch to make it easier to see. After looking into the pllc2 part of the data sheet it looks more like it should be exported like a clock that cannot be disabled. So basically, extend the frequency table to include one more frequency and handle the pll-off case as a 1:1 mapping. Cheers, / magnus -- To unsubscribe from this list: send the line "unsubscribe linux-fbdev" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
