Re: EFI mixed mode boot failure

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On Mon, 10 Jun 2024 at 18:41, Nicholas Bishop <nicholasbishop@xxxxxxxxxx> wrote:
>
> I'm seeing problems booting the kernel in EFI mixed mode (tested latest
> torvalds/master, 83a7eefedc9b). I'm attempting to boot the 32-bit compat
> entry point, not the handover protocol.
>
> It seems decompression is failing, and some print debugging pointed me
> at [1], free_mem_ptr is not initialized to zero so that branch is not
> taken. I figured that might imply BSS isn't getting zeroed, which led
> me to where the BSS is conditionally zeroed in efi_pe_entry [2].
>
> That conditional was added in df7ecce842b8 "x86/efistub: Don't clear BSS
> twice in mixed mode". I verified that prior to that commit I can boot
> successfully in mixed mode, after I cannot. The commit message says that
> "efi_pe_entry() is also used as an entrypoint by the mixed mode startup
> code, in which case BSS will already have been cleared", but I couldn't
> find where that would occur. I do see a BSS clear in efi_mixed.S, but
> it's gated on CONFIG_EFI_HANDOVER_PROTOCOL [3].
>

Thanks for the report, and for the analysis.

That commit definitely fixed an issue I encountered with the mixed
mode build, but I am struggling to reproduce that at the moment.

Which platform/EFI implementation are you using?

In any case, it seems your analysis is correct, and no BSS clearing is
performed on the compat entry point boot path. So please check whether
something like the below fixes your issue as well.

diff --git a/arch/x86/boot/compressed/efi_mixed.S
b/arch/x86/boot/compressed/efi_mixed.S
index 876fc6d46a13..ebff2a915ce0 100644
--- a/arch/x86/boot/compressed/efi_mixed.S
+++ b/arch/x86/boot/compressed/efi_mixed.S
@@ -303,6 +303,18 @@ SYM_FUNC_START(efi32_pe_entry)
        movl    $0x80000003, %eax               // EFI_UNSUPPORTED
        jnz     2f

+       call    1f
+1:     pop     %ecx
+
+       /* Clear BSS */
+       xorl    %eax, %eax
+       leal    (_bss - 1b)(%ecx), %edi
+       leal    (_ebss - 1b)(%ecx), %ecx
+       subl    %edi, %ecx
+       shrl    $2, %ecx
+       cld
+       rep     stosl
+




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