Hi, Yao,
On Wed, Nov 22, 2023 at 4:50 PM <wangyao@xxxxxxxxxx> wrote:
>
> From: Wang Yao <wangyao@xxxxxxxxxx>
>
> Refer ot UEFI spec v2.10 section 2.3.8 LoongArch Platforms:
>
> The processor is in the following execution mode during boot service:
> ...
> The memory is in physical addressing mode. LoongArch architecture
> defines two memory access mode, namely direct address translation
> mode and mapped address translation mode.
>
> So need to change MMU translation mode before config direct mapping.
>From UEFI spec v2.10 section 2.3.8, you can also see "MMU enabled", so
PG is already enabled in UEFI.
Huacai
>
> Signed-off-by: Wang Yao <wangyao@xxxxxxxxxx>
> ---
> drivers/firmware/efi/libstub/loongarch.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/firmware/efi/libstub/loongarch.c b/drivers/firmware/efi/libstub/loongarch.c
> index 807cba2693fc..4c0a84c58f5b 100644
> --- a/drivers/firmware/efi/libstub/loongarch.c
> +++ b/drivers/firmware/efi/libstub/loongarch.c
> @@ -49,7 +49,7 @@ efi_status_t efi_boot_kernel(void *handle, efi_loaded_image_t *image,
> struct exit_boot_struct priv;
> unsigned long desc_size;
> efi_status_t status;
> - u32 desc_ver;
> + u32 desc_ver, val;
>
> status = efi_alloc_virtmap(&priv.runtime_map, &desc_size, &desc_ver);
> if (status != EFI_SUCCESS) {
> @@ -69,6 +69,12 @@ efi_status_t efi_boot_kernel(void *handle, efi_loaded_image_t *image,
> priv.runtime_entry_count * desc_size, desc_size,
> desc_ver, priv.runtime_map);
>
> + /* Change address translation mode */
> + val = csr_read32(LOONGARCH_CSR_CRMD);
> + val &= ~CSR_CRMD_DA;
> + val |= CSR_CRMD_PG;
> + csr_write32(val, LOONGARCH_CSR_CRMD);
> +
> /* Config Direct Mapping */
> csr_write64(CSR_DMW0_INIT, LOONGARCH_CSR_DMWIN0);
> csr_write64(CSR_DMW1_INIT, LOONGARCH_CSR_DMWIN1);
> --
> 2.27.0
>
