Hi Boris,
On 11/2/21 1:44 PM, Borislav Petkov wrote:
On Tue, Nov 02, 2021 at 01:24:01PM -0500, Brijesh Singh wrote:
To answer your question, GHCB is registered at the time of first #VC
handling by the second exception handler.
And this is what I don't like - register at use. Instead of init
everything *before* use.
Mike can correct me, the CPUID page check is going to happen on first
#VC handling inside the early exception handler (i.e case 1).
What is the "CPUID page check"?
And no, you don't want to do any detection when an exception happens -
you want to detect *everything* *first* and then do exceptions.
See if my above explanation make sense. Based on it, I don't think it
makes sense to register the GHCB during the CPUID page detection. The
CPUID page detection will occur in early VC handling.
See above. If this needs more discussion, we can talk on IRC.
Looking at the secondary CPU bring up path it seems that we will not be
getting #VC until the early_setup_idt() is called. I am thinking to add
function to register the GHCB from the early_setup_idt()
early_setup_idt()
{
...
if (IS_ENABLED(CONFIG_MEM_ENCRYPT))
sev_snp_register_ghcb()
...
}
The above will cover the APs and for BSP case I can call the same
function just after the final IDT is loaded
cpu_init_exception_handling()
{
...
...
/* Finally load the IDT */
load_current_idt();
if (IS_ENABLED(CONFIG_MEM_ENCRYPT))
sev_snp_register_ghcb()
}
Please let me know if something like above is acceptable.
thanks
