On Tue, Jul 21, 2020 at 2:32 PM Ard Biesheuvel <ardb@xxxxxxxxxx> wrote: > > On Tue, 21 Jul 2020 at 11:57, Arnd Bergmann <arnd@xxxxxxxx> wrote: > > > > On Tue, Jul 21, 2020 at 6:18 AM Atish Patra <atishp@xxxxxxxxxxxxxx> wrote: > > > On Sat, Jul 18, 2020 at 2:24 AM Arnd Bergmann <arnd@xxxxxxxx> wrote: > > > > On Sat, Jul 18, 2020 at 3:05 AM Atish Patra <atishp@xxxxxxxxxxxxxx> wrote: > > > > > That's what the original code was doing. A fixmap entry was added to > > > > > map the original fdt > > > > > location to a virtual so that parse_dtb can be operated on a virtual > > > > > address. But we can't map > > > > > both FDT & early ioremap within a single PMD region( 2MB ). That's why > > > > > we removed the DT > > > > > mapping from the fixmap to .bss section. The other alternate option is > > > > > to increase the fixmap space to 4MB which seems more fragile. > > > > > > > > Could the original location just be part of the regular linear mapping of all > > > > RAM? > > > > > > No. Because we don't map the entire RAM until setup_vm_final(). > > > We need to parse DT before setup_vm_final() to get the memblocks and > > > reserved memory regions. > > > > Ok, I see how you create a direct mapping for the kernel image, plus > > the fixmap for the dtb in setup_vm(), and how moving the dtb into the > > kernel image simplifies that. > > > > I'm still wondering why you can't do the same kind of PGD mapping > > for the dtb that you do for the vmlinux, creating linear page table > > entries exactly for the location that holds the dtb, from dtb_pa to > > dtb_pa+((struct fdt_header*)dtb_pa)->totalsize. > > > > On arm64, we limit the size of the DT to 2MB, and reserve a pair of > PMD entries adjacent to the fixmap so we can map it r/o statically > using huge pages without using fixmap/early_ioremap slots. (Using a > pair of PMD entries allows the DT to appear at any alignment in > memory, given that PMD entries cover 2 MB each on 4k pages kernels) The arch/riscv is common for both RV32 and RV64. On RV32, we don't have PMD due to only two-levels in the page table. Although, I like the idea of two consecutive PMD mappings which are not part of FIXMAP. The RISC-V early page table is totally different from the final init_mm page table. I think we can do two consecutive PGD mappings in the early page table at lower addresses (quite below PAGE_OFFSET). I will play-around with this idea. Regards, Anup