On 2020-02-27 10:11, Linus Walleij wrote:
On Wed, Feb 26, 2020 at 5:57 PM Ard Biesheuvel <ardb@xxxxxxxxxx> wrote:
So instead, switch to the by-VA cache maintenance that the
architecture
requires for v7 and later (and ARM1176, as a side effect).
Changes since v3:
- ensure that the region that is cleaned after self-relocation of the
zImage
covers the appended DTB, if present
Apologies to Linus, but due to this change, I decided not to take your
Tested-by into account, and I would appreciate it if you could retest
this version of the series? Thanks.
No problem, I have tested it on the following:
- ARMv7 Cortex A9 x 2 Qualcomm APQ8060 DragonBoard
- ARM PB11MPCore (4 x 1176)
<pedant>
The ARM11MPCore isn't a bunch of 1176s glued together. It is actually a
very
different CPU, designed by a different team.
</pedant>
- ARMv7 Ux500 Cortex A9 x 2
The PB11MPCore is again the crucial board, if it work on that
board it works on anything, most of the time :D
That I can only agree with! ;-)
M.
--
Jazz is not dead. It just smells funny...
