On Mon, Feb 24, 2020 at 1:17 PM Ard Biesheuvel <ardb@xxxxxxxxxx> wrote: > While making changes to the EFI stub startup code, I noticed that we are > still doing set/way maintenance on the caches when booting on v7 cores. > This works today on VMs by virtue of the fact that KVM traps set/way ops > and cleans the whole address space by VA on behalf of the guest, and on > most v7 hardware, the set/way ops are in fact sufficient when only one > core is running, as there usually is no system cache. But on systems > like SynQuacer, for which 32-bit firmware is available, the current cache > maintenance only pushes the data out to the L3 system cache, where it > is not visible to the CPU once it turns the MMU and caches off. > > So instead, switch to the by-VA cache maintenance that the architecture > requires for v7 and later (and ARM1176, as a side effect). I took this v3 patch set for a ride on some ARMv7 and ARMv6 (hardware) boards using zImage:s so the compressed path should be exercised: - Ux500 (ARMv7 Cortex A9 x 2) works like a charm - RealView PB11MPCore (ARM1176 x 4 MPCore) works like a charm Tested-by: Linus Walleij <linus.walleij@xxxxxxxxxx> I can do more thorough tests with more boards if needed. Yours, Linus Walleij
