Re: [PATCH v2 0/4] ARM: decompressor: use by-VA cache maintenance for v7 cores

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On Fri, Feb 21, 2020 at 5:09 PM Robin Murphy <robin.murphy@xxxxxxx> wrote:
> On 21/02/2020 1:42 pm, Ard Biesheuvel wrote:

> > OK, so where should it be instead? Are you saying it is now required
> > to have a /soc or /smb node that contains all the device nodes?
>
> That is now my understanding, yes - if there is some property of the
> system interconnect which is not entirely transparent relative to the
> conceptual CPU-visible physical address space and needs to be described,
> then the only way to correctly encode that in DT is with an explicit
> level of 'bus' in the hierarchy to represent that interconnect.
> Otherwise these address translation properties quickly end up in
> philosophical conundrums over what the parent of the root node is.

This confirms my similar understanding. Rob sent a patch to
remove the root level dma-ranges from the ARM Integrator,
and I have since added it back below the logic module bus
after you pointed out that the dma-ranges was actually there
for that very bus.

Yours,
Linus Walleij



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