In preparation for turning the decompressor's cache clean/flush
operations into proper by-VA maintenance for v7 cores, pass the
start and end addresses of the regions that need cache maintenance
into cache_clean_flush in registers r0 and r1.
Currently, all implementations of cache_clean_flush ignore these
values, so no functional change is expected as a result of this
patch.
Signed-off-by: Ard Biesheuvel <ardb@xxxxxxxxxx>
---
arch/arm/boot/compressed/head.S | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 6c98d3d2de2f..c11b1b0a3ac6 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -1460,6 +1460,13 @@ ENTRY(efi_stub_entry)
@ Preserve return value of efi_entry() in r4
mov r4, r0
+ add r1, r4, #SZ_2M @ DT end
+ bl cache_clean_flush
+
+ ldr r0, [sp] @ relocated zImage
+ adr r2, __edata
+ ldr r1, [r2]
+ add r1, r1, r2 @ end of image
bl cache_clean_flush
@ The PE/COFF loader might not have cleaned the code we are
@@ -1489,6 +1496,8 @@ efi_load_fail:
ldr r0, =0x80000001
ldmfd sp!, {ip, pc}
ENDPROC(efi_stub_entry)
+ .align 2
+__edata: .long _edata - .
#endif
.align
--
2.17.1
