--- v4l-dvb/linux/drivers/media/dvb/frontends/ves1x93.c 2006-06-30 19:59:10.000000000 +0400
+++ mp-bc1/linux/drivers/media/dvb/frontends/ves1x93.c 2006-07-23 11:41:23.000000000 +0400
@@ -155,7 +155,7 @@ static int ves1x93_set_inversion (struct
return ves1x93_writereg (state, 0x0c, (state->init_1x93_tab[0x0c] & 0x3f) | val);
}
-static int ves1x93_set_fec (struct ves1x93_state* state, fe_code_rate_t fec)
+static int ves1x93_set_fec_compat(struct ves1x93_state* state, fe_code_rate_t fec)
{
if (fec == FEC_AUTO)
return ves1x93_writereg (state, 0x0d, 0x08);
@@ -165,11 +165,74 @@ static int ves1x93_set_fec (struct ves1x
return ves1x93_writereg (state, 0x0d, fec - FEC_1_2);
}
-static fe_code_rate_t ves1x93_get_fec (struct ves1x93_state* state)
+static int ves1x93_set_fec(struct ves1x93_state* state, enum dvbfe_fec fec)
+{
+
+ switch (fec) {
+ case DVBFE_FEC_1_2:
+ return ves1x93_writereg(state, 0x0d, 0x00);
+ case DVBFE_FEC_2_3:
+ return ves1x93_writereg(state, 0x0d, 0x01);
+ case DVBFE_FEC_3_4:
+ return ves1x93_writereg(state, 0x0d, 0x02);
+ case DVBFE_FEC_4_5:
+ return ves1x93_writereg(state, 0x0d, 0x03);
+ case DVBFE_FEC_5_6:
+ return ves1x93_writereg(state, 0x0d, 0x04);
+ case DVBFE_FEC_6_7:
+ return ves1x93_writereg(state, 0x0d, 0x05);
+ case DVBFE_FEC_7_8:
+ return ves1x93_writereg(state, 0x0d, 0x06);
+ case DVBFE_FEC_8_9:
+ return ves1x93_writereg(state, 0x0d, 0x07);
+ case DVBFE_FEC_AUTO:
+ return ves1x93_writereg(state, 0x0d, 0x08);
+ default:
+ return -EINVAL;
+ }
+}
+
+static fe_code_rate_t ves1x93_get_fec_compat(struct ves1x93_state* state)
{
return FEC_1_2 + ((ves1x93_readreg (state, 0x0d) >> 4) & 0x7);
}
+static enum dvbfe_fec ves1x93_get_fec(struct ves1x93_state* state,
+ struct dvbfe_params *p)
+{
+ u32 fec;
+
+ fec = (ves1x93_readreg(state, 0x0d) >> 4) & 0x07;
+ switch (fec) {
+ case 0:
+ p->delsys.dvbs.fec = DVBFE_FEC_1_2;
+ break;
+ case 1:
+ p->delsys.dvbs.fec = DVBFE_FEC_2_3;
+ break;
+ case 2:
+ p->delsys.dvbs.fec = DVBFE_FEC_3_4;
+ break;
+ case 3:
+ p->delsys.dvbs.fec = DVBFE_FEC_4_5;
+ break;
+ case 4:
+ p->delsys.dvbs.fec = DVBFE_FEC_5_6;
+ break;
+ case 5:
+ p->delsys.dvbs.fec = DVBFE_FEC_6_7;
+ break;
+ case 6:
+ p->delsys.dvbs.fec = DVBFE_FEC_7_8;
+ break;
+ case 7:
+ p->delsys.dvbs.fec = DVBFE_FEC_8_9;
+ break;
+ }
+
+ return 0;
+}
+
static int ves1x93_set_symbolrate (struct ves1x93_state* state, u32 srate)
{
u32 BDR;
@@ -388,13 +451,32 @@ static int ves1x93_set_frontend(struct d
{
struct ves1x93_state* state = fe->demodulator_priv;
+ if (fe->ops.tuner_ops.set_params_compat) {
+ fe->ops.tuner_ops.set_params_compat(fe, p);
+ if (fe->ops.i2c_gate_ctrl)
+ fe->ops.i2c_gate_ctrl(fe, 0);
+ }
+ ves1x93_set_inversion(state, p->inversion);
+ ves1x93_set_fec_compat(state, p->u.qpsk.fec_inner);
+ ves1x93_set_symbolrate(state, p->u.qpsk.symbol_rate);
+ state->inversion = p->inversion;
+
+ return 0;
+}
+
+static int ves1x93_set_params(struct dvb_frontend* fe,
+ struct dvbfe_params *p)
+{
+ struct ves1x93_state* state = fe->demodulator_priv;
+
if (fe->ops.tuner_ops.set_params) {
fe->ops.tuner_ops.set_params(fe, p);
- if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
+ if (fe->ops.i2c_gate_ctrl)
+ fe->ops.i2c_gate_ctrl(fe, 0);
}
- ves1x93_set_inversion (state, p->inversion);
- ves1x93_set_fec (state, p->u.qpsk.fec_inner);
- ves1x93_set_symbolrate (state, p->u.qpsk.symbol_rate);
+ ves1x93_set_inversion(state, p->inversion);
+ ves1x93_set_fec(state, p->delsys.dvbs.fec);
+ ves1x93_set_symbolrate (state, p->delsys.dvbs.symbol_rate);
state->inversion = p->inversion;
return 0;
@@ -417,7 +499,31 @@ static int ves1x93_get_frontend(struct d
if (state->inversion == INVERSION_AUTO)
p->inversion = (ves1x93_readreg (state, 0x0f) & 2) ?
INVERSION_OFF : INVERSION_ON;
- p->u.qpsk.fec_inner = ves1x93_get_fec (state);
+ p->u.qpsk.fec_inner = ves1x93_get_fec_compat(state);
+ /* XXX FIXME: timing offset !! */
+
+ return 0;
+}
+
+static int ves1x93_get_params(struct dvb_frontend* fe,
+ struct dvbfe_params *p)
+{
+ struct ves1x93_state* state = fe->demodulator_priv;
+ int afc;
+
+ afc = ((int)((char)(ves1x93_readreg (state, 0x0a) << 1))) / 2;
+ afc = (afc * (int)(p->delsys.dvbs.symbol_rate / 1000 / 8)) / 16;
+
+ p->frequency -= afc;
+
+ /*
+ * inversion indicator is only valid
+ * if auto inversion was used
+ */
+ if (state->inversion == INVERSION_AUTO)
+ p->inversion = (ves1x93_readreg (state, 0x0f) & 2) ?
+ INVERSION_OFF : INVERSION_ON;
+ p->delsys.dvbs.fec = ves1x93_get_fec(state, p);
/* XXX FIXME: timing offset !! */
return 0;
@@ -505,6 +611,37 @@ error:
return NULL;
}
+static struct dvbfe_info dvbs_info = {
+ .name = "VLSI VES1x93 DVB-S",
+ .delivery = DVBFE_DELSYS_DVBS,
+ .delsys = {
+ .dvbs.modulation = DVBFE_MOD_QPSK,
+ .dvbs.fec = DVBFE_FEC_1_2 | DVBFE_FEC_2_3 |
+ DVBFE_FEC_3_4 | DVBFE_FEC_5_6 |
+ DVBFE_FEC_7_8 | DVBFE_FEC_AUTO
+ },
+
+ .frequency_min = 950000,
+ .frequency_max = 2150000,
+ .frequency_step = 125,
+ .symbol_rate_min = 1000000,
+ .symbol_rate_max = 45000000,
+};
+
+static int ves1x93_get_info(struct dvb_frontend *fe, struct dvbfe_info *fe_info)
+{
+ memcpy(fe_info, &dvbs_info, sizeof (dvbs_info));
+
+ return 0;
+}
+
+static int ves1x93_get_delsys(struct dvb_frontend *fe, enum dvbfe_delsys *fe_delsys)
+{
+ *fe_delsys = DVBFE_DELSYS_DVBS;
+
+ return 0;
+}
+
static struct dvb_frontend_ops ves1x93_ops = {
.info = {
@@ -539,6 +676,11 @@ static struct dvb_frontend_ops ves1x93_o
.read_ucblocks = ves1x93_read_ucblocks,
.set_voltage = ves1x93_set_voltage,
+
+ .set_params = ves1x93_set_params,
+ .get_params = ves1x93_get_params,
+ .get_info = ves1x93_get_info,
+ .get_delsys = ves1x93_get_delsys,
};
module_param(debug, int, 0644);
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