Hi Brian, On Fri, Jun 10, 2005 at 05:28:30PM -0700, Brian Kuschak wrote: > My idea was at least initially to implement a very > minimalist solution, keeping things as simple as > possible. A single FPGA would implement a minimal [...] I do not believe this would be very easy to use. All the stuff like frontend control might be time critical, depending on which frontend you use, so IMHO it would be desirable to have the complete frontend driver inside the box. And also the control packets to the device would require some kind of protocol - of course it does not need to be TCP, but it could make things more flexible from the softwae point of view. Of course, UDP packet formatting and time stamping can be done in hardware much better than any CPU can do, but it is not that flexible. > The timestamping part would be easy. Reading the PCR > values from the packets wouldn't be too hard in an > FPGA, although it might not be much of an advantage if > the card just sends MPEG-TS over ethernet. The tuners > I was considering output a byte-parallel MPEG TS data > stream. The time delay from demodulation to ethernet > transmission would be very short. The timestamp thing I was talking about would require a modified UDP/RTP, but then would be able to take into account the packet delays during the way through the network. We did get an accuracy of around 10 microseconds at a wireless node behind a router with this protocol, which of course is not good enough for DVB (ASI) requirements, but good enough for A/V sync. > Regards, > Brian Regards, Wolfgang
