On Wednesday 23 March 2005 23:56, Johannes Stezenbach wrote: > Kenneth Aafl?y wrote: > > + mt352_writereg(fe, MT352_AGC_TARGET, 0x10); > > + mt352_writereg(fe, MT352_AGC_CTL, 0x23); > > + mt352_writereg(fe, 0x69, 0x00); /* Secondary AGC registers 0x69 - 0x70 */ > > + mt352_writereg(fe, 0x6A, 0xFF); > > + mt352_writereg(fe, 0x6B, 0xFF); > > + mt352_writereg(fe, 0x6C, 0x00); > > + mt352_writereg(fe, 0x6D, 0xFF); > > + mt352_writereg(fe, 0x6E, 0x00); > > + mt352_writereg(fe, 0x6F, 0x40); > > + mt352_writereg(fe, 0x70, 0x40); > > + > > + mt352_writereg(fe, MT352_ADC_CTL_1, 0x40); > > + mt352_writereg(fe, MT352_CAPT_RANGE, 0x32); > > + mt352_writereg(fe, 0xB5, 0x7A); /* AV771 EXTRA: RESERVED */ > > All those function calls generate a lot of code. I would > use a static array of reg/val pairs and a loop. And since > this pattern repeats I would offer an inline function. First (and actually only) argument would be that they are not in the fast path! We could provide a routine to load specific (reserved) sequences like this, but what's the point? There is no performance gain, only readability, if these registers ever get documented.. Or are you talking about converting it all back to the old crappy style? Kenneth
