On Sat, 2017-02-18 at 10:42 +0100, Stefan Wahren wrote: > Hi Michael, > > > Michael Zoran <mzoran@xxxxxxxxxxxx> hat am 18. Februar 2017 um > > 01:03 geschrieben: > > > > > > This appears to be an ancient issue with the old github.com > > sources. > > no, in the old sources DT binding was optional [1]. But now it should > be mandatory and i think cache-line-size should be a required > property, too. > > Please provide a error message about the missing cache-line-size > property. > > My suggestion for a subject: > > staging: vchiq_2835_arm: Make cache-line-size a required DT property > > Btw cache-line-size is a well-defined property of the cpu node (not > intended for the vchiq node), but this should be a different patch. > OK, I'll send out a V2 shortly. Good feedback. Using the properties of the cpu node will require a firmware change. I found out the hard way that if the cache-line-size property is missing on the driver node, then the firmware assumes the size is 32 regardless of the board model. I confirmed this with the PI Foundation devs. BTW, Someone at some point is going to need to properly document the DT and get it checked into the default DT files for the RPI versions. Doing that seems simple enough and I would be willing to do it, but as people have probably noticed written text is not my greatest skill. I'm a bit concerned about having a platform driver in the tree that is not properly documented. _______________________________________________ devel mailing list devel@xxxxxxxxxxxxxxxxxxxxxx http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
