Fix the checkpatch.pl issue:
CHECK: Prefer using the BIT macro
replacing bit shifting on 1 with the BIT(x) macro.
Signed-off-by: Saber Rezvani <irsaber@xxxxxxxxx>
Reviewed-by: Ian Abbott <abbotti@xxxxxxxxx>
---
drivers/staging/comedi/drivers/ni_at_ao.c | 62 +++++++++++++++----------------
1 file changed, 31 insertions(+), 31 deletions(-)
diff --git a/drivers/staging/comedi/drivers/ni_at_ao.c b/drivers/staging/comedi/drivers/ni_at_ao.c
index f27aa0e..158fa29 100644
--- a/drivers/staging/comedi/drivers/ni_at_ao.c
+++ b/drivers/staging/comedi/drivers/ni_at_ao.c
@@ -49,43 +49,43 @@
#define ATAO_CFG2_REG 0x02
#define ATAO_CFG2_CALLD_NOP (0 << 14)
#define ATAO_CFG2_CALLD(x) ((((x) >> 3) + 1) << 14)
-#define ATAO_CFG2_FFRTEN (1 << 13)
+#define ATAO_CFG2_FFRTEN BIT(13)
#define ATAO_CFG2_DACS(x) (1 << (((x) / 2) + 8))
#define ATAO_CFG2_LDAC(x) (1 << (((x) / 2) + 3))
-#define ATAO_CFG2_PROMEN (1 << 2)
-#define ATAO_CFG2_SCLK (1 << 1)
-#define ATAO_CFG2_SDATA (1 << 0)
+#define ATAO_CFG2_PROMEN BIT(2)
+#define ATAO_CFG2_SCLK BIT(1)
+#define ATAO_CFG2_SDATA BIT(0)
#define ATAO_CFG3_REG 0x04
-#define ATAO_CFG3_DMAMODE (1 << 6)
-#define ATAO_CFG3_CLKOUT (1 << 5)
-#define ATAO_CFG3_RCLKEN (1 << 4)
-#define ATAO_CFG3_DOUTEN2 (1 << 3)
-#define ATAO_CFG3_DOUTEN1 (1 << 2)
-#define ATAO_CFG3_EN2_5V (1 << 1)
-#define ATAO_CFG3_SCANEN (1 << 0)
+#define ATAO_CFG3_DMAMODE BIT(6)
+#define ATAO_CFG3_CLKOUT BIT(5)
+#define ATAO_CFG3_RCLKEN BIT(4)
+#define ATAO_CFG3_DOUTEN2 BIT(3)
+#define ATAO_CFG3_DOUTEN1 BIT(2)
+#define ATAO_CFG3_EN2_5V BIT(1)
+#define ATAO_CFG3_SCANEN BIT(0)
#define ATAO_82C53_BASE 0x06
#define ATAO_CFG1_REG 0x0a
-#define ATAO_CFG1_EXTINT2EN (1 << 15)
-#define ATAO_CFG1_EXTINT1EN (1 << 14)
-#define ATAO_CFG1_CNTINT2EN (1 << 13)
-#define ATAO_CFG1_CNTINT1EN (1 << 12)
-#define ATAO_CFG1_TCINTEN (1 << 11)
-#define ATAO_CFG1_CNT1SRC (1 << 10)
-#define ATAO_CFG1_CNT2SRC (1 << 9)
-#define ATAO_CFG1_FIFOEN (1 << 8)
-#define ATAO_CFG1_GRP2WR (1 << 7)
-#define ATAO_CFG1_EXTUPDEN (1 << 6)
-#define ATAO_CFG1_DMARQ (1 << 5)
-#define ATAO_CFG1_DMAEN (1 << 4)
+#define ATAO_CFG1_EXTINT2EN BIT(15)
+#define ATAO_CFG1_EXTINT1EN BIT(14)
+#define ATAO_CFG1_CNTINT2EN BIT(13)
+#define ATAO_CFG1_CNTINT1EN BIT(12)
+#define ATAO_CFG1_TCINTEN BIT(11)
+#define ATAO_CFG1_CNT1SRC BIT(10)
+#define ATAO_CFG1_CNT2SRC BIT(9)
+#define ATAO_CFG1_FIFOEN BIT(8)
+#define ATAO_CFG1_GRP2WR BIT(7)
+#define ATAO_CFG1_EXTUPDEN BIT(6)
+#define ATAO_CFG1_DMARQ BIT(5)
+#define ATAO_CFG1_DMAEN BIT(4)
#define ATAO_CFG1_CH(x) (((x) & 0xf) << 0)
#define ATAO_STATUS_REG 0x0a
-#define ATAO_STATUS_FH (1 << 6)
-#define ATAO_STATUS_FE (1 << 5)
-#define ATAO_STATUS_FF (1 << 4)
-#define ATAO_STATUS_INT2 (1 << 3)
-#define ATAO_STATUS_INT1 (1 << 2)
-#define ATAO_STATUS_TCINT (1 << 1)
-#define ATAO_STATUS_PROMOUT (1 << 0)
+#define ATAO_STATUS_FH BIT(6)
+#define ATAO_STATUS_FE BIT(5)
+#define ATAO_STATUS_FF BIT(4)
+#define ATAO_STATUS_INT2 BIT(3)
+#define ATAO_STATUS_INT1 BIT(2)
+#define ATAO_STATUS_TCINT BIT(1)
+#define ATAO_STATUS_PROMOUT BIT(0)
#define ATAO_FIFO_WRITE_REG 0x0c
#define ATAO_FIFO_CLEAR_REG 0x0c
#define ATAO_AO_REG(x) (0x0c + ((x) * 2))
@@ -95,7 +95,7 @@
#define ATAO_2_INT1CLR_REG 0x02
#define ATAO_2_INT2CLR_REG 0x04
#define ATAO_2_RTSISHFT_REG 0x06
-#define ATAO_2_RTSISHFT_RSI (1 << 0)
+#define ATAO_2_RTSISHFT_RSI BIT(0)
#define ATAO_2_RTSISTRB_REG 0x07
struct atao_board {
--
2.7.4
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