Re: [PATCH] Staging: goldfish: Add DMA support using dma_alloc_coherent

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Hi Shraddha,

[auto build test WARNING on v4.4-rc8]
[also build test WARNING on next-20160118]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]

url:    https://github.com/0day-ci/linux/commits/Shraddha-Barke/Staging-goldfish-Add-DMA-support-using-dma_alloc_coherent/20160119-010832
config: i386-allmodconfig (attached as .config)
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All warnings (new ones prefixed by >>):

   drivers/staging/goldfish/goldfish_nand.c: In function 'nand_setup_cmd_params':
>> drivers/staging/goldfish/goldfish_nand.c:303:26: warning: right shift count >= width of type [-Wshift-count-overflow]
     writel((u32)(dma_handle >> 32), base + NAND_CMD_PARAMS_ADDR_HIGH);
                             ^

vim +303 drivers/staging/goldfish/goldfish_nand.c

   287	{
   288		void *addr;
   289		dma_addr_t dma_handle;
   290		unsigned char __iomem  *base = nand->base;
   291	
   292		nand->cmd_params = devm_kzalloc(&pdev->dev,
   293						sizeof(struct cmd_params), GFP_KERNEL);
   294		if (!nand->cmd_params)
   295			return -1;
   296	
   297		addr = dma_alloc_coherent(&pdev->dev, sizeof(struct cmd_params),
   298					  &dma_handle, GFP_KERNEL | GFP_DMA);
   299		if (!addr) {
   300			dev_err(&pdev->dev, "allocate buffer failed\n");
   301			return -ENOMEM;
   302		}
 > 303		writel((u32)(dma_handle >> 32), base + NAND_CMD_PARAMS_ADDR_HIGH);
   304		writel((u32)dma_handle, base + NAND_CMD_PARAMS_ADDR_LOW);
   305		return 0;
   306	}
   307	
   308	static int goldfish_nand_init_device(struct platform_device *pdev,
   309					     struct goldfish_nand *nand, int id)
   310	{
   311		u32 name_len;

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

Attachment: .config.gz
Description: Binary data

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