This patch series addresses the following item from the TODO list for the MC bus driver to exit staging: * Interrupt support. For meaningful driver support we need interrupts, and thus need message interrupt support by the bus driver. MC Bus MSI Support Architecture =============================== A new IRQ domain bus token is added for the FSL-MC bus. An MSI IRQ domain is created for each top-level (root) data-path resource container (DPRC), based on its msi-parent in the device tree (which is the GIC-ITS). Child DPRCs inherit the MSI IRQ domain form their parent DPRC. MC Bus MSI Allocation --------------------- Given the way in which the GIC-ITS works, we need to pre-allocate a block of MSIs in the GIC-ITS for the IRQs of all the DPAA2 objects in the same data-path resource container (DPRC) and for the IRQ of the DPRC iself. This is due to the fact that all the IRQs for DPAA2 objects in the same DPRC (and the DPRC's own IRQ) must use the same "device Id" in the GIC-ITS. Thus, all these IRQs must share the same ITT table in the GIC-ITS, and therefore must be allocated in the GIC-ITS as a block of MSIs for the same "device Id". This is because all the DPAA2 objects in the same DPRC (and the DPRC itself) use the DPRC's SMMU stream ID as their device Id for the GIC-ITS. The DPAA2 Management Complex (MC) firmware does not assign a separate SMMU stream ID to each DPAA2 object. The MC only assigns SMMU stream IDs to DPRCs. In MC terms, the stream ID assigned to a DPRC is known as the DPRC's Isolation Context ID (ICID). As a consequence of having to pre-allocate a block of MSIs in the GIC-ITS, the object allocator of the MC bus driver needs to be extended to provide IRQ allocation services to DPAA2 device drivers and to the DPRC driver. For a given DPAA2 object, MSIs are allocated from the corresponding DPRC's pool of pre-allocated MSIs. The MSI for the DPRC itself is also allocated from this pool. The following are the patches in this series: Patch 1: Added domain bus token DOMAIN_BUS_FSL_MC_MSI Patch 2: Added generic MSI support for FSL-MC devices Patch 3: Added GICv3-ITS support for FSL-MC MSIs Patch 4: Extended MC bus allocator to include IRQs Patch 5: Changed DPRC built-in portal's mc_io to be atomic Patch 6: Populate the IRQ pool for an MC bus instance Patch 7: Set MSI domain for DPRC objects Patch 8: Fixed bug in dprc_probe() error path Patch 9: Added DPRC interrupt handler Patch 10: Added MSI support to the MC bus driver CHANGE HISTORY Changes in v2: - Addressed comment from Jiang Liu * Added a dedicated structure for FSL-MC in struct msi_desc - Addressed comment from Dan Carpenter * Renamed goto error labels to indicate what the goto does _______________________________________________ devel mailing list devel@xxxxxxxxxxxxxxxxxxxxxx http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
