[PATCH v2 12/17] staging: comedi: quatech_daqp_cs: redefine pacer clock options

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For aesthetics, define a macro for the pacer clock options and rename
the CamelCase.

Remove the unnecessary local variable in daqp_ai_cmd() used to set the
control register.

Signed-off-by: H Hartley Sweeten <hsweeten@xxxxxxxxxxxxxxxxxxx>
Cc: Ian Abbott <abbotti@xxxxxxxxx>
Cc: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
 drivers/staging/comedi/drivers/quatech_daqp_cs.c | 20 +++++++++-----------
 1 file changed, 9 insertions(+), 11 deletions(-)

diff --git a/drivers/staging/comedi/drivers/quatech_daqp_cs.c b/drivers/staging/comedi/drivers/quatech_daqp_cs.c
index 0d3cc2d..1b12006 100644
--- a/drivers/staging/comedi/drivers/quatech_daqp_cs.c
+++ b/drivers/staging/comedi/drivers/quatech_daqp_cs.c
@@ -81,10 +81,11 @@ struct daqp_private {
 #define DAQP_SCANLIST_EXT_GAIN(x)	((x) << 4)
 #define DAQP_SCANLIST_EXT_CHANNEL(x)	(x)
 
-#define DAQP_CONTROL_PACER_100kHz	0xc0
-#define DAQP_CONTROL_PACER_1MHz		0x80
-#define DAQP_CONTROL_PACER_5MHz		0x40
-#define DAQP_CONTROL_PACER_EXTERNAL	0x00
+#define DAQP_CONTROL_PACER_CLK(x)	(((x) & 0x3) << 6)
+#define DAQP_CONTROL_PACER_CLK_EXT	DAQP_CONTROL_PACER_CLK(0)
+#define DAQP_CONTROL_PACER_CLK_5MHZ	DAQP_CONTROL_PACER_CLK(1)
+#define DAQP_CONTROL_PACER_CLK_1MHZ	DAQP_CONTROL_PACER_CLK(2)
+#define DAQP_CONTROL_PACER_CLK_100KHZ	DAQP_CONTROL_PACER_CLK(3)
 #define DAQP_CONTORL_EXPANSION		0x20
 #define DAQP_CONTROL_EOS_INT_ENABLE	0x10
 #define DAQP_CONTROL_FIFO_INT_ENABLE	0x08
@@ -434,7 +435,6 @@ static int daqp_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 	struct comedi_cmd *cmd = &s->async->cmd;
 	int counter;
 	int threshold;
-	int v;
 
 	if (devpriv->stop)
 		return -EIO;
@@ -547,12 +547,10 @@ static int daqp_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 	outb((DAQP_FIFO_SIZE - threshold) & 0xff, dev->iobase + DAQP_FIFO);
 	outb((DAQP_FIFO_SIZE - threshold) >> 8, dev->iobase + DAQP_FIFO);
 
-	/* Set trigger */
-
-	v = DAQP_CONTROL_TRIGGER_CONTINUOUS | DAQP_CONTROL_TRIGGER_INTERNAL
-	    | DAQP_CONTROL_PACER_5MHz | DAQP_CONTROL_FIFO_INT_ENABLE;
-
-	outb(v, dev->iobase + DAQP_CONTROL);
+	/* 5 MHz pacer, FIFO threshold interrupt, continuous internal trigger */
+	outb(DAQP_CONTROL_PACER_CLK_5MHZ | DAQP_CONTROL_FIFO_INT_ENABLE |
+	     DAQP_CONTROL_TRIGGER_CONTINUOUS | DAQP_CONTROL_TRIGGER_INTERNAL,
+	     dev->iobase + DAQP_CONTROL);
 
 	/* Reset any pending interrupts (my card has a tendency to require
 	 * require multiple reads on the status register to achieve this)
-- 
2.5.1

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