On Tue 2015-02-17 11:07:53, Rob Landley wrote: > > > On 02/15/2015 04:40 PM, Pavel Machek wrote: > > On Wed 2015-01-21 13:27:00, Jason Gunthorpe wrote: > >> On Wed, Jan 21, 2015 at 06:33:12PM +0200, Pantelis Antoniou wrote: > >> My point is that the current firmware layer is overly cautious and > >> FPGAs are very big. My current project on small Xilinx device has a > >> 10MB programming file. The biggest Xilinx device today has a max > >> bitfile size around 122MB. > >> > >> So keeping that much memory pinned in the kernel when I can prove it > >> is uncessary for my system (either because there is no suspend/resume > >> possibility, or because I know the CPU can always access the > >> filesytem) is very undesirable. > > > > Well, your current device aalso has 1GB RAM, no? > > Unnecessarily pinning 10% of your ram is a good solution? Never said that. But I'd rather have _some_ API proposed, then try to design in everthing including kitchen sink and do nothing. Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html _______________________________________________ devel mailing list devel@xxxxxxxxxxxxxxxxxxxxxx http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
