Rephrase comment to explain original intention of function. CC: Lidza Louina <lidza.louina@xxxxxxxxx> CC: Mark Hounschell <markh@xxxxxxxxxx> Suggested-by: Tobias Klauser <tklauser@xxxxxxxxxx> Signed-off-by: Seunghun Lee <waydi1@xxxxxxxxx> --- drivers/staging/dgnc/dgnc_cls.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/staging/dgnc/dgnc_cls.c b/drivers/staging/dgnc/dgnc_cls.c index 4b65306..5a76a8e 100644 --- a/drivers/staging/dgnc/dgnc_cls.c +++ b/drivers/staging/dgnc/dgnc_cls.c @@ -1040,11 +1040,11 @@ static void cls_flush_uart_read(struct channel_t *ch) * For complete POSIX compatibility, we should be purging the * read FIFO in the UART here. * - * However, doing the statement below also incorrectly flushes - * write data as well as just basically trashing the FIFO. + * However, clearing the read FIFO (UART_FCR_CLEAR_RCVR) also + * incorrectly flushes write data as well as just basically trashing the + * FIFO. * - * I believe this is a BUG in this UART. - * So for now, we will leave the code #ifdef'ed out... + * Presumably, this is a bug in this UART. */ udelay(10); -- 1.7.9.5 _______________________________________________ devel mailing list devel@xxxxxxxxxxxxxxxxxxxxxx http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
