Redefining the Counter Preload/Latch registers as a macro that calculates
the register offset based on the comedi channel number.
Signed-off-by: H Hartley Sweeten <hsweeten@xxxxxxxxxxxxxxxxxxx>
Cc: Ian Abbott <abbotti@xxxxxxxxx>
Cc: Greg Kroah-Hartman <gregk@xxxxxxxxxxxxxxxxxxx>
---
drivers/staging/comedi/drivers/s626.c | 12 ++++++------
drivers/staging/comedi/drivers/s626.h | 16 +++-------------
2 files changed, 9 insertions(+), 19 deletions(-)
diff --git a/drivers/staging/comedi/drivers/s626.c b/drivers/staging/comedi/drivers/s626.c
index 68f677a..bbf8e26 100644
--- a/drivers/staging/comedi/drivers/s626.c
+++ b/drivers/staging/comedi/drivers/s626.c
@@ -1334,7 +1334,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_a,
.set_mode = s626_set_mode_a,
.reset_cap_flags = s626_reset_cap_flags_a,
- .my_latch_lsw = S626_LP_CNTR0ALSW,
+ .my_latch_lsw = S626_LP_CNTR(0),
.my_event_bits = S626_EVBITS(0),
}, {
.chan = 1,
@@ -1348,7 +1348,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_a,
.set_mode = s626_set_mode_a,
.reset_cap_flags = s626_reset_cap_flags_a,
- .my_latch_lsw = S626_LP_CNTR1ALSW,
+ .my_latch_lsw = S626_LP_CNTR(1),
.my_event_bits = S626_EVBITS(1),
}, {
.chan = 2,
@@ -1362,7 +1362,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_a,
.set_mode = s626_set_mode_a,
.reset_cap_flags = s626_reset_cap_flags_a,
- .my_latch_lsw = S626_LP_CNTR2ALSW,
+ .my_latch_lsw = S626_LP_CNTR(2),
.my_event_bits = S626_EVBITS(2),
}, {
.chan = 3,
@@ -1376,7 +1376,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_b,
.set_mode = s626_set_mode_b,
.reset_cap_flags = s626_reset_cap_flags_b,
- .my_latch_lsw = S626_LP_CNTR0BLSW,
+ .my_latch_lsw = S626_LP_CNTR(3),
.my_event_bits = S626_EVBITS(3),
}, {
.chan = 4,
@@ -1390,7 +1390,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_b,
.set_mode = s626_set_mode_b,
.reset_cap_flags = s626_reset_cap_flags_b,
- .my_latch_lsw = S626_LP_CNTR1BLSW,
+ .my_latch_lsw = S626_LP_CNTR(4),
.my_event_bits = S626_EVBITS(4),
}, {
.chan = 5,
@@ -1404,7 +1404,7 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_b,
.set_mode = s626_set_mode_b,
.reset_cap_flags = s626_reset_cap_flags_b,
- .my_latch_lsw = S626_LP_CNTR2BLSW,
+ .my_latch_lsw = S626_LP_CNTR(5),
.my_event_bits = S626_EVBITS(5),
},
};
diff --git a/drivers/staging/comedi/drivers/s626.h b/drivers/staging/comedi/drivers/s626.h
index 70557a0..b83424e 100644
--- a/drivers/staging/comedi/drivers/s626.h
+++ b/drivers/staging/comedi/drivers/s626.h
@@ -233,19 +233,9 @@
#define S626_LP_CRA(x) (0x0000 + (((x) % 3) * 0x4))
#define S626_LP_CRB(x) (0x0002 + (((x) % 3) * 0x4))
-/* Counter PreLoad (write) and Latch (read) Registers: */
-#define S626_LP_CNTR0ALSW 0x000C /* 0A lsw. */
-#define S626_LP_CNTR0AMSW 0x000E /* 0A msw. */
-#define S626_LP_CNTR0BLSW 0x0010 /* 0B lsw. */
-#define S626_LP_CNTR0BMSW 0x0012 /* 0B msw. */
-#define S626_LP_CNTR1ALSW 0x0014 /* 1A lsw. */
-#define S626_LP_CNTR1AMSW 0x0016 /* 1A msw. */
-#define S626_LP_CNTR1BLSW 0x0018 /* 1B lsw. */
-#define S626_LP_CNTR1BMSW 0x001A /* 1B msw. */
-#define S626_LP_CNTR2ALSW 0x001C /* 2A lsw. */
-#define S626_LP_CNTR2AMSW 0x001E /* 2A msw. */
-#define S626_LP_CNTR2BLSW 0x0020 /* 2B lsw. */
-#define S626_LP_CNTR2BMSW 0x0022 /* 2B msw. */
+/* Counter PreLoad (write) and Latch (read) Registers: 0A 1A 2A 0B 1B 2B */
+#define S626_LP_CNTR(x) (0x000c + (((x) < 3) ? 0x0 : 0x4) + \
+ (((x) % 3) * 0x8))
/* Miscellaneous Registers (read/write): */
#define S626_LP_MISC1 0x0088 /* Read/write Misc1. */
--
1.9.3
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