Re: PATCH[[vme/bridges/vme_ca91cx42.c:1382: Bad if test Bug Fix]‏‏

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On Mon, Jun 16, 2014 at 10:47:25AM +0100, Martyn Welch wrote:
> Nick,
> 
> Sorry for the delay in responding.
> 
> I'm staring at the manual for the ca91c142 and the relevant bits in
> the VSIx_CTL registers definitely need to be set to 0 for A16,
> likewise with the LM_CTL register. The pattern (3<<16) would enable
> one of the "reserved" address spaces.
> 

Nick emailed me privately that this was a static checker warning.  These
warnings are often false positives...  But I'm worried about the test:

	if ((ctl & CA91CX42_VSI_CTL_VAS_M) == CA91CX42_VSI_CTL_VAS_A16)
		*aspace = VME_A16;

That could be true when we didn't intend it.

regards,
dan carpenter

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