Add a "gto" parameter to this driver so that the VMEbus Global Timeout
value can be lowered from the default (8h -> 2048 us) or disabled
completely.
This patch also updates the TSI148_LCSR_VCTRL_GTO_* defines to match
the Tsi148 User Reference Manual, which shows these values to be 4-bits
instead of 3-bits.
Signed-off-by: Aaron Sierra <asierra@xxxxxxxxxxx>
---
drivers/vme/bridges/vme_tsi148.c | 12 ++++++++++++
drivers/vme/bridges/vme_tsi148.h | 14 ++++++++------
2 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/vme/bridges/vme_tsi148.c b/drivers/vme/bridges/vme_tsi148.c
index 61e706c..5fec483 100644
--- a/drivers/vme/bridges/vme_tsi148.c
+++ b/drivers/vme/bridges/vme_tsi148.c
@@ -42,6 +42,7 @@ static void tsi148_remove(struct pci_dev *);
/* Module parameter */
static bool err_chk;
static int geoid;
+static int gto = -1;
static const char driver_name[] = "vme_tsi148";
@@ -2414,6 +2415,14 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id)
goto err_test;
}
+ /* Setup VMEbus Global Timeout based on "gto" module parameter */
+ if (!gto || ((gto > 2) && (gto < 12))) {
+ data = ioread32be(tsi148_device->base + TSI148_LCSR_VCTRL);
+ data &= ~TSI148_LCSR_VCTRL_GTO_M;
+ data |= gto ? (gto - 3) : TSI148_LCSR_VCTRL_GTO_DIS;
+ iowrite32be(data, tsi148_device->base + TSI148_LCSR_VCTRL);
+ }
+
/* Initialize wait queues & mutual exclusion flags */
init_waitqueue_head(&tsi148_device->dma_queue[0]);
init_waitqueue_head(&tsi148_device->dma_queue[1]);
@@ -2760,5 +2769,8 @@ module_param(err_chk, bool, 0);
MODULE_PARM_DESC(geoid, "Override geographical addressing");
module_param(geoid, int, 0);
+MODULE_PARM_DESC(gto, "VMEbus Global Timeout, 0=disabled, 3-11 (2^x usec)");
+module_param(gto, int, 0);
+
MODULE_DESCRIPTION("VME driver for the Tundra Tempe VME bridge");
MODULE_LICENSE("GPL");
diff --git a/drivers/vme/bridges/vme_tsi148.h b/drivers/vme/bridges/vme_tsi148.h
index f5ed143..ad48a7c 100644
--- a/drivers/vme/bridges/vme_tsi148.h
+++ b/drivers/vme/bridges/vme_tsi148.h
@@ -779,16 +779,18 @@ static const int TSI148_GCSR_MBOX[4] = { TSI148_GCSR_MBOX0,
#define TSI148_LCSR_VCTRL_ATOEN (1<<7) /* Arbiter Time-out Enable */
#define TSI148_LCSR_VCTRL_ROBIN (1<<6) /* VMEbus Round Robin */
-#define TSI148_LCSR_VCTRL_GTO_M (7<<0) /* VMEbus Global Time-out Mask
+#define TSI148_LCSR_VCTRL_GTO_M (0xf<<0) /* VMEbus Global Time-out Mask
*/
-#define TSI148_LCSR_VCTRL_GTO_8 (0<<0) /* 8 us */
-#define TSI148_LCSR_VCTRL_GTO_16 (1<<0) /* 16 us */
-#define TSI148_LCSR_VCTRL_GTO_32 (2<<0) /* 32 us */
-#define TSI148_LCSR_VCTRL_GTO_64 (3<<0) /* 64 us */
+#define TSI148_LCSR_VCTRL_GTO_8 (0<<0) /* 8 us */
+#define TSI148_LCSR_VCTRL_GTO_16 (1<<0) /* 16 us */
+#define TSI148_LCSR_VCTRL_GTO_32 (2<<0) /* 32 us */
+#define TSI148_LCSR_VCTRL_GTO_64 (3<<0) /* 64 us */
#define TSI148_LCSR_VCTRL_GTO_128 (4<<0) /* 128 us */
#define TSI148_LCSR_VCTRL_GTO_256 (5<<0) /* 256 us */
#define TSI148_LCSR_VCTRL_GTO_512 (6<<0) /* 512 us */
-#define TSI148_LCSR_VCTRL_GTO_DIS (7<<0) /* Disabled */
+#define TSI148_LCSR_VCTRL_GTO_1024 (7<<0) /* 1024 us */
+#define TSI148_LCSR_VCTRL_GTO_2048 (8<<0) /* 2048 us (default) */
+#define TSI148_LCSR_VCTRL_GTO_DIS (0xf<<0) /* Disabled */
/*
* VMEbus Status Register CRG + $23C
--
1.7.9.5
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