There are two ADC devices on this board. The first one handles ai
channels 0-7 and the second one channels 8-15.
Define the offset that is added to the iobase to access the 2nd
ADC device.
Signed-off-by: H Hartley Sweeten <hsweeten@xxxxxxxxxxxxxxxxxxx>
Cc: Ian Abbott <abbotti@xxxxxxxxx>
Cc: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/staging/comedi/drivers/pcmmio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/comedi/drivers/pcmmio.c b/drivers/staging/comedi/drivers/pcmmio.c
index 5ff0e3a..52f1085 100644
--- a/drivers/staging/comedi/drivers/pcmmio.c
+++ b/drivers/staging/comedi/drivers/pcmmio.c
@@ -99,6 +99,7 @@ Configuration Options:
#define PCMMIO_AI_STATUS_REG_SEL (1 << 3)
#define PCMMIO_AI_STATUS_CMD_DRQ_ENA (1 << 1)
#define PCMMIO_AI_STATUS_IRQ_ENA (1 << 0)
+#define PCMMIO_AI_2ND_ADC_OFFSET 0x04
/* This stuff is all from pcmuio.c -- it refers to the DIO subdevices only */
#define CHANS_PER_PORT 8
@@ -815,7 +816,7 @@ static int pcmmio_ai_insn_read(struct comedi_device *dev,
if (chan > 7) {
chan -= 8;
- iobase += 0x4;
+ iobase += PCMMIO_AI_2ND_ADC_OFFSET;
}
if (aref == AREF_GROUND)
--
1.8.4.4
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