When setting the clock source for one of the 'A' encoders to operate in "counter" mode in `s626_set_mode_a()`, bitshift the clock source value by `S626_CRABIT_CLKSRC_A` for consistency with the other modes. This has no effect on the value since `S626_CRABIT_CLKSRC_A` is 0. Signed-off-by: Ian Abbott <abbotti@xxxxxxxxx> --- drivers/staging/comedi/drivers/s626.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/comedi/drivers/s626.c b/drivers/staging/comedi/drivers/s626.c index dd138a0..770c1d5 100644 --- a/drivers/staging/comedi/drivers/s626.c +++ b/drivers/staging/comedi/drivers/s626.c @@ -864,7 +864,7 @@ static void s626_set_mode_a(struct comedi_device *dev, break; default: /* Counter Mode: */ /* Select ENC_C and ENC_D as clock/direction inputs. */ - cra |= S626_CLKSRC_COUNTER; + cra |= S626_CLKSRC_COUNTER << S626_CRABIT_CLKSRC_A; /* Clock polarity is passed through. */ cra |= (setup & S626_STDMSK_CLKPOL) << (S626_CRABIT_CLKPOL_A - S626_STDBIT_CLKPOL); -- 1.8.4 _______________________________________________ devel mailing list devel@xxxxxxxxxxxxxxxxxxxxxx http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
