Convert the boardinfo declaration to C99 format to make it less error
prone and easier to maintain.
Signed-off-by: H Hartley Sweeten <hsweeten@xxxxxxxxxxxxxxxxxxx>
Cc: Ian Abbott <abbotti@xxxxxxxxx>
Cc: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/staging/comedi/drivers/pcl726.c | 76 ++++++++++++++++++++++++++-------
1 file changed, 61 insertions(+), 15 deletions(-)
diff --git a/drivers/staging/comedi/drivers/pcl726.c b/drivers/staging/comedi/drivers/pcl726.c
index 32fb57a..d1e1e5e 100644
--- a/drivers/staging/comedi/drivers/pcl726.c
+++ b/drivers/staging/comedi/drivers/pcl726.c
@@ -119,21 +119,67 @@ struct pcl726_board {
};
static const struct pcl726_board boardtypes[] = {
- {"pcl726", 6, 6, 0x0000, PCL726_SIZE, 1,
- PCL726_DI_HI, PCL726_DI_LO, PCL726_DO_HI, PCL726_DO_LO,
- &rangelist_726[0],},
- {"pcl727", 12, 4, 0x0000, PCL727_SIZE, 1,
- PCL727_DI_HI, PCL727_DI_LO, PCL727_DO_HI, PCL727_DO_LO,
- &rangelist_727[0],},
- {"pcl728", 2, 6, 0x0000, PCL728_SIZE, 0,
- 0, 0, 0, 0,
- &rangelist_728[0],},
- {"acl6126", 6, 5, 0x96e8, PCL726_SIZE, 1,
- PCL726_DI_HI, PCL726_DI_LO, PCL726_DO_HI, PCL726_DO_LO,
- &rangelist_726[0],},
- {"acl6128", 2, 6, 0x0000, PCL728_SIZE, 0,
- 0, 0, 0, 0,
- &rangelist_728[0],},
+ {
+ .name = "pcl726",
+ .n_aochan = 6,
+ .num_of_ranges = 6,
+ .IRQbits = 0x0000,
+ .io_range = PCL726_SIZE,
+ .have_dio = 1,
+ .di_hi = PCL726_DI_HI,
+ .di_lo = PCL726_DI_LO,
+ .do_hi = PCL726_DO_HI,
+ .do_lo = PCL726_DO_LO,
+ .range_type_list = &rangelist_726[0],
+ }, {
+ .name = "pcl727",
+ .n_aochan = 12,
+ .num_of_ranges = 4,
+ .IRQbits = 0x0000,
+ .io_range = PCL727_SIZE,
+ .have_dio = 1,
+ .di_hi = PCL727_DI_HI,
+ .di_lo = PCL727_DI_LO,
+ .do_hi = PCL727_DO_HI,
+ .do_lo = PCL727_DO_LO,
+ .range_type_list = &rangelist_727[0],
+ }, {
+ .name = "pcl728",
+ .n_aochan = 2,
+ .num_of_ranges = 6,
+ .IRQbits = 0x0000,
+ .io_range = PCL728_SIZE,
+ .have_dio = 0,
+ .di_hi = 0,
+ .di_lo = 0,
+ .do_hi = 0,
+ .do_lo = 0,
+ .range_type_list = &rangelist_728[0],
+ }, {
+ .name = "acl6126",
+ .n_aochan = 6,
+ .num_of_ranges = 5,
+ .IRQbits = 0x96e8,
+ .io_range = PCL726_SIZE,
+ .have_dio = 1,
+ .di_hi = PCL726_DI_HI,
+ .di_lo = PCL726_DI_LO,
+ .do_hi = PCL726_DO_HI,
+ .do_lo = PCL726_DO_LO,
+ .range_type_list = &rangelist_726[0],
+ }, {
+ .name = "acl6128",
+ .n_aochan = 2,
+ .num_of_ranges = 6,
+ .IRQbits = 0x0000,
+ .io_range = PCL728_SIZE,
+ .have_dio = 0,
+ .di_hi = 0,
+ .di_lo = 0,
+ .do_hi = 0,
+ .do_lo = 0,
+ .range_type_list = &rangelist_728[0],
+ },
};
struct pcl726_private {
--
1.8.3.2
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