> > The initial patch were done on x86. Then Seth did the work to make sure
> > it worked on PPC. Munchin looked on ARM and that is it.
>
> s/Munchin/Minchan
Thank you. I am sorry for butchering your name.
>
> >
> > If you have an ARM server that you would be willing to part with I would
> > be thrilled to look at it.
> >
> > >
> > > diff --git a/drivers/staging/zsmalloc/zsmalloc-main.c
> > > b/drivers/staging/zsmalloc/zsmalloc-main.c
> > > index 09a9d35..ecf75fb 100644
> > > --- a/drivers/staging/zsmalloc/zsmalloc-main.c
> > > +++ b/drivers/staging/zsmalloc/zsmalloc-main.c
> > > @@ -228,7 +228,7 @@ struct zs_pool {
> > > * mapping rather than copying
> > > * for object mapping.
> > > */
> > > -#if defined(CONFIG_ARM)
> > > +#if defined(CONFIG_ARM) && defined(CONFIG_SMP)
> > > #define USE_PGTABLE_MAPPING
>
> I don't get it. How to prevent the problem Russel described?
> The problem is that other CPU can prefetch _speculatively_ under us.
<nods> Not sure either.
>
> > > #endif
> > >
> > > .. such that it even compiles in both "guess" configurations, the
> > > slower Cortex-A8 600MHz single core system gets to use the slow copy
> > > path and the dual-core 1GHz+ Cortex-A9 (with twice the RAM..) gets to
> > > use the fast mapping path. Essentially all the patch does is "improve
> > > performance" on the fastest, best-configured, large-amounts-of-RAM,
> > > lots-of-CPU-performance ARM systems (OMAP4+, Snapdragon, Exynos4+,
> > > marvell armada, i.MX6..) while introducing the problems Russell
> > > describes, and leave performance exactly the same and potentially far
> > > more stable on the slower, memory-limited ARM machines.
> >
> > Any ideas on how to detect that?
> > >
> > > Given the purpose of zsmalloc, zram, zcache etc. this somewhat defies
> > > logic. If it's not making the memory-limited, slow ARM systems run
> > > better, what's the point?
> > >
> > > So in summary I suggest "we" (Greg? or is it Seth's responsibility?)
> > > should just back out that whole USE_PGTABLE_MAPPING chunk of code
> > > introduced with f553646. Then Russell can carry on randconfiging and I
> > > can build for SMP and UP and get the same code.. with less bugs.
> >
> > I get that you want to have this fixed right now. I think having it
> > fixed the right way is a better choice. Lets discuss that first
> > before we start tossing patches to disable parts of it.
>
> If I don't miss something, we could have 2 choice.
>
> 1) use flush_tlb_kernel_range instead of local_flush_tlb_kernel_range
> Or
> 2) use only memory copy
>
> I guess everybody want 2 because it makes code very simple and maintainable.
> Even, rencently Joonsoo sent optimize patch.
> Look at https://lkml.org/lkml/2013/1/16/68 so zram/zcache effect caused by 2
> would be minimized.
>
> But please give me the time and I will borrow quad-core embedded target board
> and test 1 on the phone with Seth's benchmark.
>
> >
> > --
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> > the body of a message to majordomo@xxxxxxxxxxxxxxx
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
> > Please read the FAQ at http://www.tux.org/lkml/
>
> --
> Kind regards,
> Minchan Kim
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