[PATCH 2/2] Staging: comedi: fix line over 80 character issue in s626.c

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This is a patch to the s626.c file that fixes up a line over 80 character warning found by the checkpatch.pl tool

Signed-off-by: Ravishankar K Mallikarjunayya <ravishankar.km@xxxxxxxxxxxxxxx>
---
 drivers/staging/comedi/drivers/s626.c |  115 ++++++++++++++++++++++++---------
 1 files changed, 84 insertions(+), 31 deletions(-)

diff --git a/drivers/staging/comedi/drivers/s626.c b/drivers/staging/comedi/drivers/s626.c
index de07552..514a0cd 100644
--- a/drivers/staging/comedi/drivers/s626.c
+++ b/drivers/staging/comedi/drivers/s626.c
@@ -781,7 +781,8 @@ static int s626_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 		/* | DEBI_CFG_INCQ| DEBI_CFG_16Q); //end */
 
 		/*  Paging is disabled. */
-		WR7146(P_DEBIPAGE, DEBI_PAGE_DISABLE);	/*  Disable MMU paging. */
+		/* Disable MMU paging. */
+		WR7146(P_DEBIPAGE, DEBI_PAGE_DISABLE);
 
 		/*  Init GPIO so that ADC Start* is negated. */
 		WR7146(P_GPIO, GPIO_BASE | GPIO1_HI);
@@ -812,7 +813,8 @@ static int s626_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 		/*  DeviceType (0xA0) */
 		/*  and DeviceAddress<<1. */
 
-		devpriv->I2CAdrs = 0xA0;	/*  I2C device address for onboard */
+		/* I2C device address for onboard */
+		devpriv->I2CAdrs = 0xA0;
 		/*  eeprom(revb) */
 
 		/*  Issue an I2C ABORT command to halt any I2C operation in */
@@ -830,7 +832,8 @@ static int s626_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 		for (i = 0; i < 2; i++) {
 			WR7146(P_I2CSTAT, I2C_CLKSEL);
 			/*  Write I2C control: reset  error flags. */
-			MC_ENABLE(P_MC2, MC2_UPLD_IIC);	/*  Invoke command upload */
+			/* Invoke command upload */
+			MC_ENABLE(P_MC2, MC2_UPLD_IIC);
 			while (!MC_TEST(P_MC2, MC2_UPLD_IIC))
 				;
 			/* and wait for upload to complete. */
@@ -1007,10 +1010,12 @@ static int s626_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 		/*  Init counters. */
 		CountersInit(dev);
 
-		/* Without modifying the state of the Battery Backup enab, disable
-		 * the watchdog timer, set DIO channels 0-5 to operate in the
-		 * standard DIO (vs. counter overflow) mode, disable the battery
-		 * charger, and reset the watchdog interval selector to zero.
+		/*
+		 * Without modifying the state of the Battery Backup enab,
+		 * disable the watchdog timer, set DIO channels 0-5 to operate
+		 * in the standard DIO (vs. counter overflow) mode, disable the
+		 * battery charger, and reset the watchdog interval selector
+		 * to zero.
 		 */
 		WriteMISC2(dev, (uint16_t) (DEBIread(dev,
 						     LP_RDMISC2) &
@@ -1175,7 +1180,10 @@ static irqreturn_t s626_irq_handler(int irq, void *d)
 				    ("s626_irq_handler: check interrupt on dio group %d %d\n",
 				     group, i);
 				if (devpriv->ai_cmd_running) {
-					/* check if interrupt is an ai acquisition start trigger */
+					/*
+					 * check if interrupt is an ai
+					 * acquisition start trigger
+					 */
 					if ((irqbit >> (cmd->start_arg -
 							(16 * group)))
 					    == 1 && cmd->start_src == TRIG_EXT) {
@@ -1212,7 +1220,10 @@ static irqreturn_t s626_irq_handler(int irq, void *d)
 						    ("s626_irq_handler: Edge capture interrupt received from channel %d\n",
 						     cmd->scan_begin_arg);
 
-						/*  Trigger ADC scan loop start by setting RPS Signal 0. */
+						/*
+						 * Trigger ADC scan loop start
+						 *  by setting RPS Signal 0.
+						 */
 						MC_ENABLE(P_MC2, MC2_ADC_RPS);
 
 						DEBUG
@@ -1254,7 +1265,10 @@ static irqreturn_t s626_irq_handler(int irq, void *d)
 						    ("s626_irq_handler: Edge capture interrupt received from channel %d\n",
 						     cmd->convert_arg);
 
-						/*  Trigger ADC scan loop start by setting RPS Signal 0. */
+						/*
+						 * Trigger ADC scan loop start
+						 * by setting RPS Signal 0.
+						 */
 						MC_ENABLE(P_MC2, MC2_ADC_RPS);
 
 						DEBUG
@@ -1340,7 +1354,10 @@ static irqreturn_t s626_irq_handler(int irq, void *d)
 					    ("s626_irq_handler: conver timer trigger!!! %d\n",
 					     devpriv->ai_convert_count);
 
-					/*  Trigger ADC scan loop start by setting RPS Signal 0. */
+					/*
+					 * Trigger ADC scan loop start
+					 * by setting RPS Signal 0.
+					 */
 					MC_ENABLE(P_MC2, MC2_ADC_RPS);
 				}
 			}
@@ -1357,7 +1374,10 @@ static irqreturn_t s626_irq_handler(int irq, void *d)
 				DEBUG
 				    ("s626_irq_handler: scan timer trigger!!!\n");
 
-				/*  Trigger ADC scan loop start by setting RPS Signal 0. */
+				/*
+				 * Trigger ADC scan loop start
+				 * by setting RPS Signal 0.
+				 */
 				MC_ENABLE(P_MC2, MC2_ADC_RPS);
 			}
 
@@ -1389,7 +1409,7 @@ static int s626_detach(struct comedi_device *dev)
 		if (devpriv->base_addr) {
 			/* interrupt mask */
 			WR7146(P_IER, 0);	/*  Disable master interrupt. */
-			WR7146(P_ISR, IRQ_GPIO3 | IRQ_RPS1);	/*  Clear board's IRQ status flag. */
+			/* Clear board's IRQ status flag. */
+			WR7146(P_ISR, IRQ_GPIO3 | IRQ_RPS1);
 
 			/*  Disable the watchdog timer and battery charger. */
 			WriteMISC2(dev, 0);
@@ -1495,7 +1515,8 @@ void ResetADC(struct comedi_device *dev, uint8_t * ppl)
 		/*  immediate data to */
 		/*  shadow RAM. */
 		*pRPS++ = LocalPPL;
-		*pRPS++ = RPS_CLRSIGNAL | RPS_DEBI;	/*  Reset "shadow RAM uploaded" */
+		/* Reset "shadow RAM uploaded" */
+		*pRPS++ = RPS_CLRSIGNAL | RPS_DEBI;
 		/*  flag. */
 		*pRPS++ = RPS_UPLOAD | RPS_DEBI;	/*  Invoke shadow RAM upload. */
 		*pRPS++ = RPS_PAUSE | RPS_DEBI;	/*  Wait for shadow upload to */
@@ -1551,16 +1572,22 @@ void ResetADC(struct comedi_device *dev, uint8_t * ppl)
 		 * busy) and for data from previous conversion to shift into FB
 		 * BUFFER 1 register.
 		 */
-		*pRPS++ = RPS_PAUSE | RPS_GPIO2;	/*  Wait for ADC done. */
+		/* Wait for ADC done. */
+		*pRPS++ = RPS_PAUSE | RPS_GPIO2;
 
-		/*  Transfer ADC data from FB BUFFER 1 register to DMA buffer. */
+		/*
+		 * Transfer ADC data from FB BUFFER 1 register
+		 * to DMA buffer.
+		 */
 		*pRPS++ = RPS_STREG | (BUGFIX_STREG(P_FB_BUFFER1) >> 2);
 		*pRPS++ =
 		    (uint32_t) devpriv->ANABuf.PhysicalBase +
 		    (devpriv->AdcItems << 2);
 
-		/*  If this slot's EndOfPollList flag is set, all channels have */
-		/*  now been processed. */
+		/*
+		 * If this slot's EndOfPollList flag is set,
+		 * all channels have now been processed.
+		 */
 		if (*ppl++ & EOPL) {
 			devpriv->AdcItems++;	/*  Adjust poll list item count. */
 			break;	/*  Exit poll list processing loop. */
@@ -1837,7 +1864,10 @@ static int s626_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 	case TRIG_FOLLOW:
 		break;
 	case TRIG_TIMER:
-		/*  set a conter to generate adc trigger at scan_begin_arg interval */
+		/*
+		 * set a conter to generate adc trigger at
+		 * scan_begin_arg interval
+		 */
 		k = &encpriv[5];
 		tick = s626_ns_to_timer((int *)&cmd->scan_begin_arg,
 					cmd->flags & TRIG_ROUND_MASK);
@@ -1864,7 +1894,10 @@ static int s626_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 	case TRIG_NOW:
 		break;
 	case TRIG_TIMER:
-		/*  set a conter to generate adc trigger at convert_arg interval */
+		/*
+		 * set a conter to generate adc trigger at
+		 * convert_arg interval
+		 */
 		k = &encpriv[4];
 		tick = s626_ns_to_timer((int *)&cmd->convert_arg,
 					cmd->flags & TRIG_ROUND_MASK);
@@ -2193,8 +2226,10 @@ static void s626_dio_init(struct comedi_device *dev)
 	/*  For each group of sixteen channels ... */
 	for (group = 0; group < S626_DIO_BANKS; group++) {
 		s = dev->subdevices + 2 + group;
-		DEBIwrite(dev, diopriv->WRIntSel, 0);	/*  Disable all interrupts. */
-		DEBIwrite(dev, diopriv->WRCapSel, 0xFFFF);	/*  Disable all event */
+		/* Disable all interrupts. */
+		DEBIwrite(dev, diopriv->WRIntSel, 0);
+		/* Disable all event */
+		DEBIwrite(dev, diopriv->WRCapSel, 0xFFFF);
 		/*  captures. */
 		DEBIwrite(dev, diopriv->WREdgSel, 0);	/*  Init all DIOs to */
 		/*  default edge */
@@ -2496,7 +2531,10 @@ static void WriteTrimDAC(struct comedi_device *dev, uint8_t LogicalChan,
 {
 	uint32_t chan;
 
-	/*  Save the new setpoint in case the application needs to read it back later. */
+	/*
+	 * Save the new setpoint in case the application needs to
+	 * read it back later.
+	 */
 	devpriv->TrimSetpoint[LogicalChan] = (uint8_t) DacData;
 
 	/*  Map logical channel number to physical channel number. */
@@ -2638,10 +2676,15 @@ static void SetDAC(struct comedi_device *dev, uint16_t chan, short dacdata)
 	 * running after the packet has been sent to the target DAC.
 	 */
 	SendDAC(dev, 0x0F000000
-		/* Continue clock after target DAC data (write to non-existent trimdac). */
+			/*
+			 * Continue clock after target DAC data (write
+			 * to non-existent trimdac).
+			 */
 		| 0x00004000
-		/* Address the two main dual-DAC devices (TSL's chip select enables
-		 * target device). */
+		/*
+		 * Address the two main dual-DAC devices (TSL's chip select
+		 * enables target device).
+		 */
 		| ((uint32_t) (chan & 1) << 15)
 		/*  Address the DAC channel within the  device. */
 		| (uint32_t) dacdata);	/*  Include DAC setpoint data. */
@@ -2881,7 +2924,10 @@ static void CloseDMAB(struct comedi_device *dev, struct bufferDMA *pdma,
  * 2=2A, 3=0B, 4=1B, 5=2B.
  */
 
-/* Forward declarations for functions that are common to both A and B counters: */
+/*
+ * Forward declarations for functions that are common to
+ * both A and B counters:
+ */
 
 /* ******  PRIVATE COUNTER FUNCTIONS ****** */
 
@@ -3124,7 +3170,10 @@ static void SetMode_B(struct comedi_device *dev, struct enc_private *k,
 	DEBIreplace(dev, k->MyCRB, CRBMSK_CLKENAB_A | CRBMSK_LATCHSRC, crb);
 }
 
-/*  Return/set a counter's enable.  enab: 0=always enabled, 1=enabled by index. */
+/*
+ * Return/set a counter's enable.  enab: 0=always enabled,
+ * 1=enabled by index.
+ */
 
 static void SetEnable_A(struct comedi_device *dev, struct enc_private *k,
 			uint16_t enab)
@@ -3341,7 +3390,8 @@ static void PulseIndex_B(struct comedi_device *dev, struct enc_private *k)
 {
 	register uint16_t crb;
 
-	crb = DEBIread(dev, k->MyCRB) & ~CRBMSK_INTCTRL;	/*  Pulse index. */
+	/* Pulse index. */
+	crb = DEBIread(dev, k->MyCRB) & ~CRBMSK_INTCTRL;
 	DEBIwrite(dev, k->MyCRB, (uint16_t) (crb ^ CRBMSK_INDXPOL_B));
 	DEBIwrite(dev, k->MyCRB, crb);
 }
@@ -3352,7 +3402,8 @@ static void Preload(struct comedi_device *dev, struct enc_private *k,
 		    uint32_t value)
 {
 	DEBUG("Preload: preload enter\n");
-	DEBIwrite(dev, (uint16_t) (k->MyLatchLsw), (uint16_t) value);	/*  Write value to preload register. */
+	/* Write value to preload register. */
+	DEBIwrite(dev, (uint16_t) (k->MyLatchLsw), (uint16_t) value);
 	DEBUG("Preload: preload step 1\n");
 	DEBIwrite(dev, (uint16_t) (k->MyLatchLsw + 2),
 		  (uint16_t) (value >> 16));
@@ -3371,7 +3422,9 @@ static void CountersInit(struct comedi_device *dev)
 	    (CLKMULT_1X << BF_CLKMULT) |	/*  Clock multiplier is 1x. */
 	    (CLKENAB_INDEX << BF_CLKENAB);	/*  Enabled by index */
 
-	/*  Disable all counter interrupts and clear any captured counter events. */
+	/*
+	 * Disable all counter interrupts and clear any captured counter events.
+	 */
 	for (chan = 0; chan < S626_ENCODER_CHANNELS; chan++) {
 		k = &encpriv[chan];
 		k->SetMode(dev, k, Setup, TRUE);
-- 
1.6.5.2

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