There is no need to write IO and memory space window Host PCI bridge registers before doing anything else. Just use its default values which should be ok. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx> --- drivers/staging/mt7621-pci/pci-mt7621.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c index fc2543d076c4..8a682ce22508 100644 --- a/drivers/staging/mt7621-pci/pci-mt7621.c +++ b/drivers/staging/mt7621-pci/pci-mt7621.c @@ -88,7 +88,6 @@ #define PCIE_CLK_GEN_DIS 0 #define PCIE_CLK_GEN1_DIS GENMASK(30, 24) #define PCIE_CLK_GEN1_EN (BIT(27) | BIT(25)) -#define RALINK_PCI_IO_MAP_BASE 0x1e160000 #define MEMORY_BASE 0x0 /** @@ -666,9 +665,6 @@ static int mt7621_pci_probe(struct platform_device *pdev) return 0; } - pcie_write(pcie, 0xffffffff, RALINK_PCI_MEMBASE); - pcie_write(pcie, RALINK_PCI_IO_MAP_BASE, RALINK_PCI_IOBASE); - mt7621_pcie_enable_ports(pcie); err = mt7621_pci_parse_request_of_pci_ranges(pcie); -- 2.19.1 _______________________________________________ devel mailing list devel@xxxxxxxxxxxxxxxxxxxxxx http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
